From patchwork Wed Aug 17 20:25:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Li X-Patchwork-Id: 597958 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 97069C25B08 for ; Wed, 17 Aug 2022 20:26:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241885AbiHQU0T (ORCPT ); Wed, 17 Aug 2022 16:26:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40002 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241953AbiHQU0H (ORCPT ); Wed, 17 Aug 2022 16:26:07 -0400 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D31EEA98E6; Wed, 17 Aug 2022 13:25:59 -0700 (PDT) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id E238420024C; Wed, 17 Aug 2022 22:25:57 +0200 (CEST) Received: from smtp.na-rdc02.nxp.com (usphx01srsp001v.us-phx01.nxp.com [134.27.49.11]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 7BC37200240; Wed, 17 Aug 2022 22:25:57 +0200 (CEST) Received: from right.am.freescale.net (right.am.freescale.net [10.81.116.134]) by usphx01srsp001v.us-phx01.nxp.com (Postfix) with ESMTP id 10B3F40AA2; Wed, 17 Aug 2022 13:25:55 -0700 (MST) From: Li Yang To: shawnguo@kernel.org, devicetree@vger.kernel.org Cc: robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Xiaowei Bao , Li Yang , Hou Zhiqiang Subject: [PATCH v4 2/2] arm64: dts: lx2160a: add pcie EP mode nodes Date: Wed, 17 Aug 2022 15:25:38 -0500 Message-Id: <20220817202538.21493-3-leoyang.li@nxp.com> X-Mailer: git-send-email 2.25.1.377.g2d2118b In-Reply-To: <20220817202538.21493-1-leoyang.li@nxp.com> References: <20220817202538.21493-1-leoyang.li@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Xiaowei Bao The LX2160A PCIe EP mode nodes based on controller used on lx2160a rev2. Signed-off-by: Xiaowei Bao Signed-off-by: Li Yang Reviewed-by: Hou Zhiqiang --- .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 60 +++++++++++++++++++ 1 file changed, 60 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi index a7c549277dcc..97786b454ec7 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi @@ -1131,6 +1131,16 @@ pcie1: pcie@3400000 { status = "disabled"; }; + pcie_ep1: pcie-ep@3400000 { + compatible = "fsl,lx2160ar2-pcie-ep", "fsl,ls-pcie-ep"; + reg = <0x00 0x03400000 0x0 0x00100000 + 0x80 0x00000000 0x8 0x00000000>; + reg-names = "regs", "addr_space"; + num-ob-windows = <8>; + num-ib-windows = <8>; + status = "disabled"; + }; + pcie2: pcie@3500000 { compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie"; reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */ @@ -1159,6 +1169,16 @@ pcie2: pcie@3500000 { status = "disabled"; }; + pcie_ep2: pcie-ep@3500000 { + compatible = "fsl,lx2160ar2-pcie-ep", "fsl,ls-pcie-ep"; + reg = <0x00 0x03500000 0x0 0x00100000 + 0x88 0x00000000 0x8 0x00000000>; + reg-names = "regs", "addr_space"; + num-ob-windows = <8>; + num-ib-windows = <8>; + status = "disabled"; + }; + pcie3: pcie@3600000 { compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie"; reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */ @@ -1187,6 +1207,16 @@ pcie3: pcie@3600000 { status = "disabled"; }; + pcie_ep3: pcie-ep@3600000 { + compatible = "fsl,lx2160ar2-pcie-ep", "fsl,ls-pcie-ep"; + reg = <0x00 0x03600000 0x0 0x00100000 + 0x90 0x00000000 0x8 0x00000000>; + reg-names = "regs", "addr_space"; + num-ob-windows = <256>; + num-ib-windows = <24>; + status = "disabled"; + }; + pcie4: pcie@3700000 { compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie"; reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */ @@ -1215,6 +1245,16 @@ pcie4: pcie@3700000 { status = "disabled"; }; + pcie_ep4: pcie-ep@3700000 { + compatible = "fsl,lx2160ar2-pcie-ep", "fsl,ls-pcie-ep"; + reg = <0x00 0x03700000 0x0 0x00100000 + 0x98 0x00000000 0x8 0x00000000>; + reg-names = "regs", "addr_space"; + num-ob-windows = <8>; + num-ib-windows = <8>; + status = "disabled"; + }; + pcie5: pcie@3800000 { compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie"; reg = <0x00 0x03800000 0x0 0x00100000 /* controller registers */ @@ -1243,6 +1283,16 @@ pcie5: pcie@3800000 { status = "disabled"; }; + pcie_ep5: pcie-ep@3800000 { + compatible = "fsl,lx2160ar2-pcie-ep", "fsl,ls-pcie-ep"; + reg = <0x00 0x03800000 0x0 0x00100000 + 0xa0 0x00000000 0x8 0x00000000>; + reg-names = "regs", "addr_space"; + num-ob-windows = <256>; + num-ib-windows = <24>; + status = "disabled"; + }; + pcie6: pcie@3900000 { compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie"; reg = <0x00 0x03900000 0x0 0x00100000 /* controller registers */ @@ -1271,6 +1321,16 @@ pcie6: pcie@3900000 { status = "disabled"; }; + pcie_ep6: pcie-ep@3900000 { + compatible = "fsl,lx2160ar2-pcie-ep", "fsl,ls-pcie-ep"; + reg = <0x00 0x03900000 0x0 0x00100000 + 0xa8 0x00000000 0x8 0x00000000>; + reg-names = "regs", "addr_space"; + num-ob-windows = <8>; + num-ib-windows = <8>; + status = "disabled"; + }; + smmu: iommu@5000000 { compatible = "arm,mmu-500"; reg = <0 0x5000000 0 0x800000>;