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[2a01:c23:c4d4:2700:f22f:74ff:fe21:725]) by smtp.googlemail.com with ESMTPSA id uz12-20020a170907118c00b00711aed17047sm12234329ejb.28.2022.07.02.16.12.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Jul 2022 16:12:42 -0700 (PDT) From: Martin Blumenstingl To: linux-mtd@lists.infradead.org, devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org, tlanger@maxlinear.com, rtanwar@maxlinear.com, miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, Martin Blumenstingl Subject: [PATCH v3 3/8] mtd: rawnand: intel: Read the chip-select line from the correct OF node Date: Sun, 3 Jul 2022 01:12:22 +0200 Message-Id: <20220702231227.1579176-4-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.37.0 In-Reply-To: <20220702231227.1579176-1-martin.blumenstingl@googlemail.com> References: <20220702231227.1579176-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The chip select has to be read from the flash node which is a child node of the NAND controller. Fixes: 0b1039f016e8a3 ("mtd: rawnand: Add NAND controller support on Intel LGM SoC") Signed-off-by: Martin Blumenstingl --- drivers/mtd/nand/raw/intel-nand-controller.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/raw/intel-nand-controller.c b/drivers/mtd/nand/raw/intel-nand-controller.c index e91b879b32bd..3df3f32423f9 100644 --- a/drivers/mtd/nand/raw/intel-nand-controller.c +++ b/drivers/mtd/nand/raw/intel-nand-controller.c @@ -16,6 +16,7 @@ #include #include +#include #include #include #include @@ -580,6 +581,7 @@ static int ebu_nand_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct ebu_nand_controller *ebu_host; + struct device_node *chip_np; struct nand_chip *nand; struct mtd_info *mtd; struct resource *res; @@ -604,7 +606,12 @@ static int ebu_nand_probe(struct platform_device *pdev) if (IS_ERR(ebu_host->hsnand)) return PTR_ERR(ebu_host->hsnand); - ret = device_property_read_u32(dev, "reg", &cs); + chip_np = of_get_next_child(dev->of_node, NULL); + if (!chip_np) + return dev_err_probe(dev, -EINVAL, + "Could not find child node for the NAND chip\n"); + + ret = of_property_read_u32(chip_np, "reg", &cs); if (ret) { dev_err(dev, "failed to get chip select: %d\n", ret); return ret; @@ -660,7 +667,7 @@ static int ebu_nand_probe(struct platform_device *pdev) writel(ebu_host->cs[cs].addr_sel | EBU_ADDR_MASK(5) | EBU_ADDR_SEL_REGEN, ebu_host->ebu + EBU_ADDR_SEL(cs)); - nand_set_flash_node(&ebu_host->chip, dev->of_node); + nand_set_flash_node(&ebu_host->chip, chip_np); mtd = nand_to_mtd(&ebu_host->chip); if (!mtd->name) {