From patchwork Fri Jun 10 08:56:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 580842 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A719DC433EF for ; Fri, 10 Jun 2022 09:05:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1348456AbiFJJFv (ORCPT ); Fri, 10 Jun 2022 05:05:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40624 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1348419AbiFJJFW (ORCPT ); Fri, 10 Jun 2022 05:05:22 -0400 Received: from mail.baikalelectronics.com (mail.baikalelectronics.com [87.245.175.230]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 2CFA629C8F; Fri, 10 Jun 2022 02:04:55 -0700 (PDT) Received: from mail (mail.baikal.int [192.168.51.25]) by mail.baikalelectronics.com (Postfix) with ESMTP id 1989816AD; Fri, 10 Jun 2022 11:58:06 +0300 (MSK) DKIM-Filter: OpenDKIM Filter v2.11.0 mail.baikalelectronics.com 1989816AD DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baikalelectronics.ru; s=mail; t=1654851486; bh=/+Ql9S8Lce7AJFIReyXSZGMayLYvafFWb23OhLb0lTE=; h=From:To:CC:Subject:Date:In-Reply-To:References:From; b=eFT929A+5CICKi+DkhZGGjxOKL8BO6nIcmernwVF7vawHVAE6OmnWEOW3DZu/bhsh Z76f686WYb86gnan0mBCULr1VsCyTbCn1M/qk6qsQjIhgTI7mcPaH7z7FARj8THIhX f2tI+OTvlVgQjxzMqJ7lO22XJr+MaGMhH4e7xHBQ= Received: from localhost (192.168.53.207) by mail (192.168.51.25) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 10 Jun 2022 11:57:13 +0300 From: Serge Semin To: Rob Herring , Bjorn Helgaas , Lorenzo Pieralisi , Jingoo Han , Gustavo Pimentel , Rob Herring , Krzysztof Kozlowski CC: Serge Semin , Serge Semin , Alexey Malahov , Pavel Parkhomenko , =?utf-8?q?Krzys?= =?utf-8?q?ztof_Wilczy=C5=84ski?= , Frank Li , Manivannan Sadhasivam , , , Subject: [PATCH v3 06/17] dt-bindings: PCI: dwc: Add max-functions EP property Date: Fri, 10 Jun 2022 11:56:54 +0300 Message-ID: <20220610085706.15741-7-Sergey.Semin@baikalelectronics.ru> In-Reply-To: <20220610085706.15741-1-Sergey.Semin@baikalelectronics.ru> References: <20220610085706.15741-1-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 X-ClientProxiedBy: MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25) Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org In accordance with [1] the CX_NFUNC IP-core synthesize parameter is responsible for the number of physical functions to support in the EP mode. Its upper limit is 32. Let's use it to constrain the number of PCIe functions the DW PCIe EP DT-nodes can advertise. [1] Synopsys DesignWare Cores PCI Express Controller Databook - DWC PCIe Endpoint, Version 5.40a, March 2019, p. 887. Signed-off-by: Serge Semin --- Changelog v3: - This is a new patch unpinned from the next one: https://lore.kernel.org/linux-pci/20220503214638.1895-2-Sergey.Semin@baikalelectronics.ru/ by the Rob' request. (@Rob) --- Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml index b04ce7ddb796..9411366d6ca7 100644 --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml @@ -53,6 +53,9 @@ properties: items: enum: [dbi, dbi2, config, atu, addr_space, link, atu_dma, appl] + max-functions: + maximum: 32 + required: - compatible - reg @@ -73,4 +76,5 @@ examples: phy-names = "pcie0", "pcie1", "pcie2", "pcie3"; max-link-speed = <3>; + max-functions = /bits/ 8 <4>; };