From patchwork Wed Jun 1 22:56:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 577901 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4A745C433EF for ; Wed, 1 Jun 2022 22:57:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232441AbiFAW5i (ORCPT ); Wed, 1 Jun 2022 18:57:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50732 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232443AbiFAW53 (ORCPT ); Wed, 1 Jun 2022 18:57:29 -0400 Received: from mail-pl1-x631.google.com (mail-pl1-x631.google.com [IPv6:2607:f8b0:4864:20::631]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 65838369F0 for ; Wed, 1 Jun 2022 15:57:26 -0700 (PDT) Received: by mail-pl1-x631.google.com with SMTP id n8so3056147plh.1 for ; Wed, 01 Jun 2022 15:57:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version; bh=xRQ+zT9V8ePJFZsKLVObUzfHWmtC7ZZ1YxZ0ZcbqLd8=; b=R0Q7nUtqzUOb5ubM0RAb08+FKTcSmnsV6y3rkPhOFpitJknScO/OBlka+opQ01egho 6Hpxbq9bWl7Gk5YsF019koFodFGCwiHMTJuB5M3niC0f56cmM6oqj+MbKbyA8r9xdnLq iC/oljiLBYtxe3jkEZK4kgpVhDPuY7TsvXPDc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version; bh=xRQ+zT9V8ePJFZsKLVObUzfHWmtC7ZZ1YxZ0ZcbqLd8=; b=lW5rOCnws/UEBvFxjRYu0TjBmPAaqg0I8jE+/f7K3+crPZcg5+CIxhekpGe67R4WMB TZSfwBYtaLyhHK6MxsPeAT7XN6zu7gwQLm1IiMPOM1QsxY/pqGittCA4DEG+gz4FDgKx igFhhyHXhHZtyAjmKr3DxxvZf7yfe8FAPqp3sGcZq2XqZZkHldOLvv/TmIesJQL0MiHH KngUgTKpVJ3yqeV5ems1/JDuFQLNGRgT0/PdgJRGXFW/VRM3szBbKAYkdejFxmi7+yrQ KH7sHH3xjpRroYRJqTtjMm20TVcQw//H5ApI/BpbFv30m+WWjt1kjK6EUSn5c/YlCwu0 Adjg== X-Gm-Message-State: AOAM531q2K1dWvbJhB7JCrQVV5OVI4JRVO5bM9580+5hPKWYQpEAp1Ma AGOmnNM+jn9nEhpTc1CaSwRaAA== X-Google-Smtp-Source: ABdhPJwQ1oT032BqWY4fza0GCBhAg4hL4V2dRGQwjWIB3EX2lKXMEyjBTIK2Vw3PICgHJBSVGdX2uw== X-Received: by 2002:a17:902:da90:b0:163:f654:ee7b with SMTP id j16-20020a170902da9000b00163f654ee7bmr1689357plx.27.1654124245457; Wed, 01 Jun 2022 15:57:25 -0700 (PDT) Received: from T3500-3.dhcp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id k8-20020a170902d58800b001641244d051sm1999738plh.257.2022.06.01.15.57.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Jun 2022 15:57:24 -0700 (PDT) From: William Zhang To: Linux ARM List , Broadcom Kernel List Cc: joel.peshkin@broadcom.com, tomer.yacoby@broadcom.com, kursad.oney@broadcom.com, philippe.reynes@softathome.com, dan.beygelman@broadcom.com, samyon.furman@broadcom.com, anand.gore@broadcom.com, florian.fainelli@broadcom.com, William Zhang , Florian Fainelli , Krzysztof Kozlowski , Nicolas Saenz Julienne , Rob Herring , Stefan Wahren , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/5] arm64: dts: add dts files for bcmbca soc 63158 Date: Wed, 1 Jun 2022 15:56:51 -0700 Message-Id: <20220601225654.18519-4-william.zhang@broadcom.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220601225654.18519-1-william.zhang@broadcom.com> References: <20220601225654.18519-1-william.zhang@broadcom.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add dts for ARMv8 based broadband SoC BCM63158. bcm63158.dtsi is the SoC description dts header and bcm963158.dts is a simple dts file for Broadcom BCM963158 Reference board that only enable the UART port. Signed-off-by: William Zhang --- Changes in v2: - Change internal bus address and size cells from 2 to 1 - Fix pmu compatible string - Remove unnecessary cpu_on and cpu_off properties from psci node - Add the missing gic registers and interrupts property to gic node arch/arm64/boot/dts/broadcom/Makefile | 1 + arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 2 + .../boot/dts/broadcom/bcmbca/bcm63158.dtsi | 128 ++++++++++++++++++ .../boot/dts/broadcom/bcmbca/bcm963158.dts | 30 ++++ 4 files changed, 161 insertions(+) create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/Makefile create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile index 5082fcd1fea5..e8584d3b698f 100644 --- a/arch/arm64/boot/dts/broadcom/Makefile +++ b/arch/arm64/boot/dts/broadcom/Makefile @@ -9,5 +9,6 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-400.dtb \ bcm2837-rpi-zero-2-w.dtb subdir-y += bcm4908 +subdir-y += bcmbca subdir-y += northstar2 subdir-y += stingray diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile new file mode 100644 index 000000000000..d5f89245336c --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0 +dtb-$(CONFIG_ARCH_BCMBCA) += bcm963158.dtb diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi new file mode 100644 index 000000000000..13629702f70b --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi @@ -0,0 +1,128 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +#include +#include + +/ { + compatible = "brcm,bcm63158", "brcm,bcmbca"; + #address-cells = <2>; + #size-cells = <2>; + + interrupt-parent = <&gic>; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + B53_0: cpu@0 { + compatible = "brcm,brahma-b53"; + device_type = "cpu"; + reg = <0x0 0x0>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + B53_1: cpu@1 { + compatible = "brcm,brahma-b53"; + device_type = "cpu"; + reg = <0x0 0x1>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + B53_2: cpu@2 { + compatible = "brcm,brahma-b53"; + device_type = "cpu"; + reg = <0x0 0x2>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + B53_3: cpu@3 { + compatible = "brcm,brahma-b53"; + device_type = "cpu"; + reg = <0x0 0x3>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + L2_0: l2-cache0 { + compatible = "cache"; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + + pmu: pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = , + , + , + ; + interrupt-affinity = <&B53_0>, <&B53_1>, + <&B53_2>, <&B53_3>; + }; + + clocks: clocks { + periph_clk: periph-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + uart_clk: uart-clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clocks = <&periph_clk>; + clock-div = <4>; + clock-mult = <1>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + axi@81000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x81000000 0x8000>; + + gic: interrupt-controller@1000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + interrupt-controller; + interrupts = ; + reg = <0x1000 0x1000>, + <0x2000 0x2000>, + <0x4000 0x2000>, + <0x6000 0x2000>; + }; + }; + + bus@ff800000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0xff800000 0x800000>; + + uart0: serial@12000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x12000 0x1000>; + interrupts = ; + clocks = <&uart_clk>, <&uart_clk>; + clock-names = "uartclk", "apb_pclk"; + status = "disabled"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts new file mode 100644 index 000000000000..eba07e0b1ca6 --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +/dts-v1/; + +#include "bcm63158.dtsi" + +/ { + model = "Broadcom BCM963158 Reference Board"; + compatible = "brcm,bcm963158", "brcm,bcm63158", "brcm,bcmbca"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x08000000>; + }; +}; + +&uart0 { + status = "okay"; +};