From patchwork Mon May 30 20:14:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabien Parent X-Patchwork-Id: 577331 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B709CC43217 for ; Mon, 30 May 2022 20:15:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243145AbiE3UPL (ORCPT ); Mon, 30 May 2022 16:15:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43544 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243155AbiE3UPI (ORCPT ); Mon, 30 May 2022 16:15:08 -0400 Received: from mail-wr1-x430.google.com (mail-wr1-x430.google.com [IPv6:2a00:1450:4864:20::430]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3633968980 for ; Mon, 30 May 2022 13:15:07 -0700 (PDT) Received: by mail-wr1-x430.google.com with SMTP id x17so6950977wrg.6 for ; Mon, 30 May 2022 13:15:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=dM1Miawze8sKsOoDP6eNmyD3lGqsAxM4OZW/CsiBCqQ=; b=DV2NtNINZimMJqxbhbxmkjmSZbFIXt24MmqWcuL8/ZvoThgLXtp65oYm46Qeakffzp 8YiwMlunn2bwit89barcdfiiBdM1VgK6D127PSqRqZPGniRfU8r4b2fPz4sDdo5G9y77 Kl3OQVuwTNBNkTr5qh/edlV6c4xN3cHk3LXZAqoB6py0WCQHzq5ovmoWOWF31g7x2Ntx r2DOWTOIsoO7MxsUbK5Bpu2HFOYlbuAdMIx7iyTj/RHJpvNIEwW+E6NxPl/2nCVgsBQC 2OjX2o7X8EMlkC0ZIOh+kdfCyv+s2p1+KbPalUDTcj0g2XgHloTLysG/DR4T1qKo37IF REog== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=dM1Miawze8sKsOoDP6eNmyD3lGqsAxM4OZW/CsiBCqQ=; b=xvOxb4tKAo4Vwd72vfwR/X8NB+i0RxVCpH28Ti3AEQKKqJ5p5dONU9aoC5+Rb07xDP fEBv27t62A0NEiDADAX6an8CWxu4DmcXdLTeSAtcWHxWQRSSteFYiP4F2th+xag40mGa 7OSwKrceXCOxkpxdnHQU1EgbCbPMP69q6wOeuLk/XhCzgJMdwgAIvJhQaEi5+eD6/gei vkTmNOpIePfl1uxzB2jNt84wLdU7MwgNFHee0YLHqRFdsYT7MdVrhIrA+NMCxhtmcyqY zzoZ5Me4cpTAx95no3aK3naSbb8f9s8TCYZgT9r3FZJ9hZPaZMpxRmpmtr99re3X1a9F BQLw== X-Gm-Message-State: AOAM531p2+dAA6kdI+JvngHZ5a9LLL0KwzxxWC5e+nmSLXZ2pKnjqnot EG0ZmBOa0rSNif85R3pyt3sirQ== X-Google-Smtp-Source: ABdhPJwSSjliAbJddGUfeFIGpLGf9IXHfVrDvhvqnHzFPZT6n2sJsLeNwQeWBnxlnJ7JxvHZVTrllw== X-Received: by 2002:a5d:6051:0:b0:20d:d49:26b8 with SMTP id j17-20020a5d6051000000b0020d0d4926b8mr45843588wrt.454.1653941705665; Mon, 30 May 2022 13:15:05 -0700 (PDT) Received: from localhost.localdomain ([88.160.162.107]) by smtp.gmail.com with ESMTPSA id t1-20020adfe101000000b0020d110bc39esm9770401wrz.64.2022.05.30.13.15.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 May 2022 13:15:04 -0700 (PDT) From: Fabien Parent To: matthias.bgg@gmail.com, ck.hu@mediatek.com, jitao.shi@mediatek.com, krzysztof.kozlowski+dt@linaro.org, robh+dt@kernel.org Cc: chunkuang.hu@kernel.org, p.zabel@pengutronix.de, airlied@linux.ie, daniel@ffwll.ch, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Fabien Parent Subject: [PATCH 5/7] soc: mediatek: mt8365-mmsys: add DPI/HDMI display path Date: Mon, 30 May 2022 22:14:34 +0200 Message-Id: <20220530201436.902505-5-fparent@baylibre.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220530201436.902505-1-fparent@baylibre.com> References: <20220530201436.902505-1-fparent@baylibre.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Right now only the DSI path connections are described in the mt8365 mmsys driver. The external path will be DPI/HDMI. This commit adds the connections for DPI/HDMI. Signed-off-by: Fabien Parent --- drivers/soc/mediatek/mt8365-mmsys.h | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/soc/mediatek/mt8365-mmsys.h b/drivers/soc/mediatek/mt8365-mmsys.h index 24129a6c25f8..7abaf048d91e 100644 --- a/drivers/soc/mediatek/mt8365-mmsys.h +++ b/drivers/soc/mediatek/mt8365-mmsys.h @@ -10,6 +10,9 @@ #define MT8365_DISP_REG_CONFIG_DISP_RDMA0_RSZ0_SEL_IN 0xf60 #define MT8365_DISP_REG_CONFIG_DISP_COLOR0_SEL_IN 0xf64 #define MT8365_DISP_REG_CONFIG_DISP_DSI0_SEL_IN 0xf68 +#define MT8365_DISP_REG_CONFIG_DISP_RDMA1_SOUT_SEL 0xfd0 +#define MT8365_DISP_REG_CONFIG_DISP_DPI0_SEL_IN 0xfd8 +#define MT8365_DISP_REG_CONFIG_DISP_LVDS_SYS_CFG_00 0xfdc #define MT8365_RDMA0_SOUT_COLOR0 0x1 #define MT8365_DITHER_MOUT_EN_DSI0 0x1 @@ -18,6 +21,10 @@ #define MT8365_RDMA0_RSZ0_SEL_IN_RDMA0 0x0 #define MT8365_DISP_COLOR_SEL_IN_COLOR0 0x0 #define MT8365_OVL0_MOUT_PATH0_SEL BIT(0) +#define MT8365_RDMA1_SOUT_DPI0 0x1 +#define MT8365_DPI0_SEL_IN_RDMA1 0x0 +#define MT8365_LVDS_SYS_CFG_00_SEL_LVDS_PXL_CLK 0x1 +#define MT8365_DPI0_SEL_IN_RDMA1 0x0 static const struct mtk_mmsys_routes mt8365_mmsys_routing_table[] = { { @@ -55,6 +62,21 @@ static const struct mtk_mmsys_routes mt8365_mmsys_routing_table[] = { MT8365_DISP_REG_CONFIG_DISP_RDMA0_RSZ0_SEL_IN, MT8365_RDMA0_RSZ0_SEL_IN_RDMA0, MT8365_RDMA0_RSZ0_SEL_IN_RDMA0 }, + { + DDP_COMPONENT_RDMA1, DDP_COMPONENT_DPI0, + MT8365_DISP_REG_CONFIG_DISP_LVDS_SYS_CFG_00, + MT8365_LVDS_SYS_CFG_00_SEL_LVDS_PXL_CLK, MT8365_LVDS_SYS_CFG_00_SEL_LVDS_PXL_CLK + }, + { + DDP_COMPONENT_RDMA1, DDP_COMPONENT_DPI0, + MT8365_DISP_REG_CONFIG_DISP_DPI0_SEL_IN, + MT8365_DPI0_SEL_IN_RDMA1, MT8365_DPI0_SEL_IN_RDMA1 + }, + { + DDP_COMPONENT_RDMA1, DDP_COMPONENT_DPI0, + MT8365_DISP_REG_CONFIG_DISP_RDMA1_SOUT_SEL, + MT8365_RDMA1_SOUT_DPI0, MT8365_RDMA1_SOUT_DPI0 + }, }; #endif /* __SOC_MEDIATEK_MT8365_MMSYS_H */