From patchwork Thu May 26 13:01:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: zelong dong X-Patchwork-Id: 576319 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 53E24C433EF for ; Thu, 26 May 2022 13:17:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245175AbiEZNRc (ORCPT ); Thu, 26 May 2022 09:17:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55848 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230010AbiEZNR3 (ORCPT ); Thu, 26 May 2022 09:17:29 -0400 X-Greylist: delayed 903 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Thu, 26 May 2022 06:17:27 PDT Received: from mail-sh.amlogic.com (mail-sh.amlogic.com [58.32.228.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 10D93C6E42; Thu, 26 May 2022 06:17:26 -0700 (PDT) Received: from droid10-sz.amlogic.com (10.28.8.20) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2176.14; Thu, 26 May 2022 21:02:19 +0800 From: Zelong Dong To: , , , , , CC: , , , , Zelong Dong Subject: [PATCH] arm64: dts: meson: add reset controller for Meson-S4 SoC Date: Thu, 26 May 2022 21:01:58 +0800 Message-ID: <20220526130158.36651-1-zelong.dong@amlogic.com> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 X-Originating-IP: [10.28.8.20] Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the reset controller device of Meson-S4 SoC family Signed-off-by: Zelong Dong Reviewed-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi index 480afa2cc61f..c750bc60786f 100644 --- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi @@ -94,6 +94,12 @@ uart_B: serial@7a000 { clocks = <&xtal>, <&xtal>, <&xtal>; clock-names = "xtal", "pclk", "baud"; }; + + reset: reset-controller@2000 { + compatible = "amlogic,meson-s4-reset"; + reg = <0x0 0x2000 0x0 0x98>; + #reset-cells = <1>; + }; }; }; };