From patchwork Fri May 20 18:31:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 574653 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 720C8C4167E for ; Fri, 20 May 2022 18:32:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351773AbiETScg (ORCPT ); Fri, 20 May 2022 14:32:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41670 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1352716AbiETSbz (ORCPT ); Fri, 20 May 2022 14:31:55 -0400 Received: from mail-lj1-x22f.google.com (mail-lj1-x22f.google.com [IPv6:2a00:1450:4864:20::22f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 795803E5D0 for ; Fri, 20 May 2022 11:31:29 -0700 (PDT) Received: by mail-lj1-x22f.google.com with SMTP id r3so3695479ljd.7 for ; Fri, 20 May 2022 11:31:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=NdSvHfXJPo04rlWXmRuhXyu21lDLotG2rBlKXKJ11GQ=; b=EEwTuALcxRNmSVRNDadTU1k+Ae9oz3bcn1BfXl16XqaEFPZVWbIbgCDscVm/NO5qHB angznNMlHmZydT81JVc1NojEbI5k1w1e3xnk5V9CBTo2V4NKE3EIY9KVTOgiwx0GSq+G VUxjzthgCUD6Cd6rQjLwIQkTS00W7dg80uh+h2pSG49dsET0GE5Ls7secTEa4PXA2R7X TlCupT8U4phL03A6yzAapfF7GlMz6sfcetNyQX8b7o/m6MErHsVeDc5nOtbDeIpGbIEE 2oPN2GS8zXj49vrGuoXnMVjALYQLbMsJrymnP18PT/lN3CnTDzo7GIeNPLmtkRZ71Jyy DFVQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=NdSvHfXJPo04rlWXmRuhXyu21lDLotG2rBlKXKJ11GQ=; b=NgdTpZLxsR3X8BCB1qUeo7KFG11tzSxqTT2WceKUaiulIPxc3cr3ClVxzEQIgJj9er x6uPqUIAnNqHTbrgks/8TBvzQXG+E/Rc2a9kG+/USJdVHmdw+y0XGPtJ6p5I1S6ZAEJK OvKDsIL+m25ySOOl5i56gABRSkwMYqNvJHziIxQpjDALPs8Q/ocn+1wTErREYw0N0f+N eXLN8GSyiI8HbWQuYaEx30J8yY4cZQaqCqU9p2Niy3BUm/xGQJhH9m4sdbIdDyjr7Lwl yzNMZkfG3NIhcgZ525peJJqcr6FFuBVPdfAh4Kc9Jqb0w75bqjQkhD7E6ZOfUEFF6nK8 llNA== X-Gm-Message-State: AOAM5307ml0d10EiQHw+t5Cy5+hd0tAjd3Ff8T1XzD7Bg9oE3I3uI4UA hn12c4bj0jgXqKHoQMub929VX/srr7sTbw== X-Google-Smtp-Source: ABdhPJy4OGzYU700BuclxX8ZOeJt4SOdbuuh9c2d8gLYg6uy/uvkKWiN4PxVlN3oT9Dgp5TNrXGccQ== X-Received: by 2002:a05:651c:158b:b0:250:a056:7e48 with SMTP id h11-20020a05651c158b00b00250a0567e48mr6320959ljq.64.1653071488068; Fri, 20 May 2022 11:31:28 -0700 (PDT) Received: from eriador.lan ([2001:470:dd84:abc0::8a5]) by smtp.gmail.com with ESMTPSA id t22-20020a2e9556000000b0024f3d1daef4sm392951ljh.124.2022.05.20.11.31.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 May 2022 11:31:27 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Jingoo Han , Gustavo Pimentel , Lorenzo Pieralisi , Bjorn Helgaas , Stanimir Varbanov , Manivannan Sadhasivam Cc: Vinod Koul , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, Johan Hovold , Johan Hovold Subject: [PATCH v11 6/7] arm64: dts: qcom: sm8250: provide additional MSI interrupts Date: Fri, 20 May 2022 21:31:13 +0300 Message-Id: <20220520183114.1356599-7-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220520183114.1356599-1-dmitry.baryshkov@linaro.org> References: <20220520183114.1356599-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On SM8250 each group of MSI interrupts is mapped to the separate host interrupt. Describe each of interrupts in the device tree for PCIe0 host. Tested on Qualcomm RB5 platform with first group of MSI interrupts being used by the PME and attached ath11k WiFi chip using second group of MSI interrupts. Reviewed-by: Johan Hovold Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 410272a1e19b..523a035ffc5f 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -1807,8 +1807,16 @@ pcie0: pci@1c00000 { ranges = <0x01000000 0x0 0x60200000 0 0x60200000 0x0 0x100000>, <0x02000000 0x0 0x60300000 0 0x60300000 0x0 0x3d00000>; - interrupts = ; - interrupt-names = "msi"; + interrupts = , + , + , + , + , + , + , + ; + interrupt-names = "msi0", "msi1", "msi2", "msi3", + "msi4", "msi5", "msi6", "msi7"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &intc 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */