From patchwork Mon May 16 08:25:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 573129 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 55C24C433EF for ; Mon, 16 May 2022 08:25:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241691AbiEPIZQ (ORCPT ); Mon, 16 May 2022 04:25:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40868 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241688AbiEPIZO (ORCPT ); Mon, 16 May 2022 04:25:14 -0400 Received: from relay4-d.mail.gandi.net (relay4-d.mail.gandi.net [217.70.183.196]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 901F336E1C; Mon, 16 May 2022 01:25:12 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 3FCE1E0002; Mon, 16 May 2022 08:25:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1652689511; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=8ahdxlylHUe3mADgzeD98ByHKZe3nsmtka5ti0feGmk=; b=BGyvDrc8YpREmaMLiuh0p4Kl5oHYIajZoFCj2Md5gbPd0+kTWBX/wvO6aZTPfFY4h03CGV +yWSH89VLD1+7W6hUUCJH6Kob6EdUtaiTK5dO6VWw/Enxcdn18UxvYh32kfOE+N+lLcxp1 vVlZ1w/vUwaHlx/sDPHp9yNwzqqWXhskv3Mx/IQ7HrfKfhzcfh2s+jMZ6Y1fIEId2ShbDP lpYjVdvi+ufhX/W81Ly+GmEnaevuXsZaURNQpBuO9gvXr/Ym5Gb5ULg3jIZybZFvXlvnPU DUVxwc7FHYFR7NLDsyhgR+qwC/9bTB7FsygWAaZhZCFobzrn04vFuAZtuVD6bg== From: Miquel Raynal To: Alessandro Zummo , Alexandre Belloni , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm Cc: Miquel Raynal , linux-rtc@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Gareth Williams , Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Krzysztof Kozlowski Subject: [PATCH v7 1/5] dt-bindings: rtc: rzn1: Describe the RZN1 RTC Date: Mon, 16 May 2022 10:25:00 +0200 Message-Id: <20220516082504.33913-2-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220516082504.33913-1-miquel.raynal@bootlin.com> References: <20220516082504.33913-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add new binding file for this RTC. Signed-off-by: Miquel Raynal Reviewed-by: Krzysztof Kozlowski Reviewed-by: Geert Uytterhoeven --- .../bindings/rtc/renesas,rzn1-rtc.yaml | 70 +++++++++++++++++++ 1 file changed, 70 insertions(+) create mode 100644 Documentation/devicetree/bindings/rtc/renesas,rzn1-rtc.yaml diff --git a/Documentation/devicetree/bindings/rtc/renesas,rzn1-rtc.yaml b/Documentation/devicetree/bindings/rtc/renesas,rzn1-rtc.yaml new file mode 100644 index 000000000000..2d4741f51663 --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/renesas,rzn1-rtc.yaml @@ -0,0 +1,70 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/renesas,rzn1-rtc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/N1 SoCs Real-Time Clock DT bindings + +maintainers: + - Miquel Raynal + +allOf: + - $ref: rtc.yaml# + +properties: + compatible: + items: + - enum: + - renesas,r9a06g032-rtc + - const: renesas,rzn1-rtc + + reg: + maxItems: 1 + + interrupts: + minItems: 3 + maxItems: 3 + + interrupt-names: + items: + - const: alarm + - const: timer + - const: pps + + clocks: + maxItems: 1 + + clock-names: + const: hclk + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - power-domains + +unevaluatedProperties: false + +examples: + - | + #include + #include + rtc@40006000 { + compatible = "renesas,r9a06g032-rtc", "renesas,rzn1-rtc"; + reg = <0x40006000 0x1000>; + interrupts = , + , + ; + interrupt-names = "alarm", "timer", "pps"; + clocks = <&sysctrl R9A06G032_HCLK_RTC>; + clock-names = "hclk"; + power-domains = <&sysctrl>; + start-year = <2000>; + };