From patchwork Fri May 13 17:16:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 572665 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8F9CEC433EF for ; Fri, 13 May 2022 17:16:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1382805AbiEMRQ3 (ORCPT ); Fri, 13 May 2022 13:16:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46286 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1382780AbiEMRQ1 (ORCPT ); Fri, 13 May 2022 13:16:27 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 25E5363FF; Fri, 13 May 2022 10:16:26 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: kholk11) with ESMTPSA id 3C4F31F463B9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1652462185; bh=+SNQosugZ3rRLzeC91179/d1xD7fpoErRAwb547pmRM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XWKopfN0gCAevdMs64GrFGRQOoXOWOZ5dEbZuDUJ/CfmDvVIP/DIRM49p9aEv0Erv pLkOpeIUHtpk8LLXs0b0zqommLAo6ctdZ5HVztrATXa8QHC5UX1Ig4h3dQwwkgFM+M SrrejUVWOGN6ACEUd17B2N6ov+dEJneNr+JWygg37z9Ntf0VqS1wtJWj72TqiA26v7 v7xWklVkDa3B4Bs8dglaW3EV9GFo3cBMe/PAOY72ZF0AEQ7A9V9BVNliog63roMQV3 2CGMUCEOd6yiR/hwHKASMEmD1rDPF4epMoLeTIFcuoze2UFxscKK9x4Qey/2mvgBQ6 cAnqszV9VLFKw== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, konrad.dybcio@somainline.org, marijn.suijten@somainline.org, martin.botka@somainline.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, paul.bouchara@somainline.org, kernel@collabora.com, AngeloGioacchino Del Regno Subject: [PATCH 3/7] arm64: dts: mediatek: mt6795: Add Cortex A53 PMU nodes Date: Fri, 13 May 2022 19:16:13 +0200 Message-Id: <20220513171617.504430-4-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220513171617.504430-1-angelogioacchino.delregno@collabora.com> References: <20220513171617.504430-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the required nodes to enable the PMU on this SoC. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt6795.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts/mediatek/mt6795.dtsi index 1456b9035336..639104b3f693 100644 --- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi @@ -160,6 +160,15 @@ uart_clk: dummy26m { #clock-cells = <0>; }; + pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = , + , + , + ; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + timer { compatible = "arm,armv8-timer"; interrupt-parent = <&gic>;