From patchwork Thu May 5 23:14:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 570035 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 94BBEC433F5 for ; Thu, 5 May 2022 23:14:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245209AbiEEXSg (ORCPT ); Thu, 5 May 2022 19:18:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53014 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234769AbiEEXSf (ORCPT ); Thu, 5 May 2022 19:18:35 -0400 Received: from mail-pg1-x529.google.com (mail-pg1-x529.google.com [IPv6:2607:f8b0:4864:20::529]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1922A5DD19 for ; Thu, 5 May 2022 16:14:55 -0700 (PDT) Received: by mail-pg1-x529.google.com with SMTP id 6so4728649pgb.13 for ; Thu, 05 May 2022 16:14:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=0kSQb2icz9EuOBfEIavY1Q/aWHO2riUJJut5MHkXzYQ=; b=S0Sy52a0le6z4xwOpfZmcEWeenlEQ8Ny5+NOsiV9S4WMz7U3/f+JzITvJnQltHt/fh W/ORtfNYaxnBYg5XBurxElcnewtdnmEM2batwjzyFoBv1i9xCVFhXsoUL764CUpEBAbh hAGapFLJLcwOGD1ZWZVT1v0J/duqNja6LRVUg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=0kSQb2icz9EuOBfEIavY1Q/aWHO2riUJJut5MHkXzYQ=; b=jZeew/oToYoydA+pP/fDmZRfs4LIq9BC6+9NRpbfgvjnL8y3ckZ6H8qrsp2rTr93UQ pfTR1zjFcTVUwSCQKSlkqcGUYeIx9B4GWayriCQ+Q0ZNKD/vGsCg4zjSAbt5IJdV8DNq QDlKInSRI2vDL0MhEm4hpktYmkfwiM1GybmTUWAnnXSW93pLHgl4ymGTL7yWVpLiJ8f0 ceI2EvYdE9AcS3/G2GTuszate/F4OsssT4Or/zKt8E1J3QxoCj8Vfm9UvJVtFx5tHt6P u6NjlUiw+JVq12ZtwqPVUMrP6aMb4vWcL7yIhjzVsaJtu9qD5H9pQo6jZ/gjlwl64CQD 69tg== X-Gm-Message-State: AOAM530+3Ez/wUpgyeLkIkOES3QHUCTDoXidrf3Bxic0mu282hhM/4kW h7APPcKJtWuN9zc8zQLNpZYRoA== X-Google-Smtp-Source: ABdhPJz1Ia/6Uv5F5lGAd/5I0letqAwHCmGa5BKl/B4Z2msc8l/CSz4cY/+EbZgHTjJmPSiBnaxrlA== X-Received: by 2002:a63:2317:0:b0:3c1:f437:2e7c with SMTP id j23-20020a632317000000b003c1f4372e7cmr351115pgj.351.1651792494626; Thu, 05 May 2022 16:14:54 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:201:b675:c6dd:f7f3:5454]) by smtp.gmail.com with ESMTPSA id r20-20020aa79634000000b0050dc7a3e88asm1961946pfg.9.2022.05.05.16.14.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 May 2022 16:14:54 -0700 (PDT) From: Douglas Anderson To: Bjorn Andersson Cc: swboyd@chromium.org, mka@chromium.org, Douglas Anderson , Andy Gross , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] arm64: dts: qcom: sc7280: Set SPI flash to 50 MHz for herobrine boards Date: Thu, 5 May 2022 16:14:30 -0700 Message-Id: <20220505161425.1.Icf6f3796d2fa122b4c0566d9317b461bfbc24b7f@changeid> X-Mailer: git-send-email 2.36.0.512.ge40c2bad7a-goog MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org sc7280-herobrine based boards are specced to be able to access their SPI flash at 50 MHz with the drive strength of the pins set at 8. The drive strength is already set to 8 in "sc7280-herobrine.dtsi", so let's bump up the clock. The matching firmware change for this is at: https://review.coreboot.org/c/coreboot/+/63948 NOTE: the firmware change isn't _required_ to make the kernel work at 50 MHz, it merely shows that the boards are known to work fine at 50 MHz. ALSO NOTE: this doesn't update the "sc7280-chrome-common.dtsi" file which is used by both herobrine boards and IDP. At the moment the IDP boards aren't configuring a drive strength of 8 and it seems safer to just leave them at the slower speed if they're already working. Signed-off-by: Douglas Anderson --- arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi index d58045dd7334..939d9e922834 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi @@ -452,6 +452,10 @@ &sdhc_2 { cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>; }; +&spi_flash { + spi-max-frequency = <50000000>; +}; + /* Fingerprint, enabled on a per-board basis */ ap_spi_fp: &spi9 { pinctrl-0 = <&qup_spi9_data_clk>, <&qup_spi9_cs_gpio_init_high>, <&qup_spi9_cs_gpio>;