| Message ID | 20220429115252.2360496-5-pgwipeout@gmail.com |
|---|---|
| State | Accepted |
| Commit | 13e0ee34f39c01948a7bbaab0b3c225d9b00a5bb |
| Headers | show |
| Series | [v2,1/7] dt-bindings: arm: rockchip: Add Pine64 Quartz64 Model B | expand |
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index ca20d7b91fe5..61a6d9d4c8a0 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -750,6 +750,17 @@ sdmmc1: mmc@fe2c0000 { status = "disabled"; }; + sfc: spi@fe300000 { + compatible = "rockchip,sfc"; + reg = <0x0 0xfe300000 0x0 0x4000>; + interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>; + clock-names = "clk_sfc", "hclk_sfc"; + pinctrl-0 = <&fspi_pins>; + pinctrl-names = "default"; + status = "disabled"; + }; + sdhci: mmc@fe310000 { compatible = "rockchip,rk3568-dwcmshc"; reg = <0x0 0xfe310000 0x0 0x10000>;
Add the sfc node to the rk356x device tree. This enables spi flash support for this soc. Signed-off-by: Peter Geis <pgwipeout@gmail.com> --- arch/arm64/boot/dts/rockchip/rk356x.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+)