From patchwork Fri Apr 29 10:40:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 568411 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D501C433F5 for ; Fri, 29 Apr 2022 10:41:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1357549AbiD2Kou (ORCPT ); Fri, 29 Apr 2022 06:44:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55816 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241432AbiD2Kot (ORCPT ); Fri, 29 Apr 2022 06:44:49 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 819DE6F9EA; Fri, 29 Apr 2022 03:41:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1651228890; x=1682764890; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ZuFa87SywQwTRkYIIlhDNx8UApQkwnBlhQXVx2P4TEQ=; b=2lbNFDe+jO7z4dYLKk6hKGGWCoyngf54AMZcpZNS28zS3vrxlZW4XMfm v9OIquAjEIBegMC4+wzu2sLIvo77+xhtszfw9aXtoJiqAXSaE4nA/cmkX qAiKWvxS6El3dhR4EWFh+9PQzvmqa79vq0YE01oqnZ55WAAfIB5xusjyK W9quRN+4knhj9KgcMXi42Gl1JFdzSTk1w/eso2rkoOUOOWWhKN5T3Eu1C HLyp0JGnXQZk/7NSvtZAbFtj7hBJY+f7RXDEiZ9yOK/09FqjucDtZpvWn deHJONe//5o2ILdkZDsOIxAIrCdDU/9LrLi3X/P9dMeZJ01+bEM1Y43FF g==; X-IronPort-AV: E=Sophos;i="5.91,298,1647327600"; d="scan'208";a="94031887" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 29 Apr 2022 03:41:29 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Fri, 29 Apr 2022 03:41:29 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Fri, 29 Apr 2022 03:41:26 -0700 From: Conor Dooley To: Rob Herring , Krzysztof Kozlowski , Palmer Dabbelt CC: Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Daire McNamara , Cyril Jean , , , , "Arnd Bergmann" Subject: [PATCH v1 1/8] riscv: dts: microchip: remove icicle memory clocks Date: Fri, 29 Apr 2022 11:40:34 +0100 Message-ID: <20220429104040.197161-2-conor.dooley@microchip.com> X-Mailer: git-send-email 2.35.2 In-Reply-To: <20220429104040.197161-1-conor.dooley@microchip.com> References: <20220429104040.197161-1-conor.dooley@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The clock properties in the icicle kit's memory entries cause dtbs_check errors: arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dtb: /: memory@80000000: 'clocks' does not match any of the regexes: 'pinctrl-[0-9]+' Get rid of the clocks to avoid the errors. Reported-by: Palmer Dabbelt Fixes: 0fa6107eca41 ("RISC-V: Initial DTS for Microchip ICICLE board") Fixes: 5b28df37d311 ("riscv: dts: microchip: update peripherals in icicle kit device tree") Signed-off-by: Conor Dooley --- arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts index 3392153dd0f1..c71d6aa6137a 100644 --- a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts @@ -32,14 +32,12 @@ cpus { ddrc_cache_lo: memory@80000000 { device_type = "memory"; reg = <0x0 0x80000000 0x0 0x2e000000>; - clocks = <&clkcfg CLK_DDRC>; status = "okay"; }; ddrc_cache_hi: memory@1000000000 { device_type = "memory"; reg = <0x10 0x0 0x0 0x40000000>; - clocks = <&clkcfg CLK_DDRC>; status = "okay"; }; };