From patchwork Tue Apr 26 13:41:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabien Parent X-Patchwork-Id: 566250 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5C8C2C4321E for ; Tue, 26 Apr 2022 13:41:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345745AbiDZNpD (ORCPT ); Tue, 26 Apr 2022 09:45:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53428 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351068AbiDZNpB (ORCPT ); Tue, 26 Apr 2022 09:45:01 -0400 Received: from mail-wr1-x42e.google.com (mail-wr1-x42e.google.com [IPv6:2a00:1450:4864:20::42e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 636AA3CA77 for ; Tue, 26 Apr 2022 06:41:54 -0700 (PDT) Received: by mail-wr1-x42e.google.com with SMTP id e2so19259520wrh.7 for ; Tue, 26 Apr 2022 06:41:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=K24pI48bckEH3Y3oSHXKjeqIQ2pS3pf+1QNVp3L1AGk=; b=i08Wa0+I8vFqudmLcKEpFUrwdRPyrrmNGYg9ArqPlVQA/tJVlnOobY+g4E4P6S+h3a R1H604yOHa5tAQ3PBTVTS74d67hDZNWH9/AIcx/LeoAfVE1+xz9gbna3tKAl4ojTqdvq 5fCqS2TFR6WdzG6e8JXN9436Js/xK4YQo7zWW80kJ8mIGzxu4Cb/qoBOHtrUib3MC59c 3hQLeOBI8OdAsq1BY9dLfVUcN2r1t/hSwEcGDfZKGuR+c38WYBj86mt3jqhVHs3DVfQk L3Mh3OG2rE0gkT0QyrpsxkNvQWBHAkNCFjUOHP/4M5fy+CvoarAXjTvWpO8ZE4i5CKcS bvMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=K24pI48bckEH3Y3oSHXKjeqIQ2pS3pf+1QNVp3L1AGk=; b=672SoPmGguotApktZXVnr7Lxvv2ZXTfDxp7mZznIarUz9NaCjTXdqLzBAcnkU17hhX c47g0toAeHhJg8GQtZrz4tPj3p+jtx60CZfeyBiIhsZk//WuoMdBVM/FNJMB+qBOLIvQ V3bUAPCvhFFEeNDVjwzm+XIazNPvH6wXBskXC1SOxaIHkJV4wviTsLALvyIhnKvHoklW PZy+Bk0gbxCRcEvM+o97SU6nmOp1pNWGLObG8p5QgqXGfki3K1OleoVzZpL8+8kRzuUm h/jDp4pxU1YrKoILeKaByhe+ktd0bVK9X5Dj32JRnCewGAjh9vJ6PmjdP8FQU9YQ0m9+ 3OZg== X-Gm-Message-State: AOAM533pcclBGoxtoXbnBFP6rWfsNC3Hwnl2pmWvEO/IjJuTlIyIp70+ wtJe6UOlUEZOwpanZZqbXQ3F+g== X-Google-Smtp-Source: ABdhPJwTqjD7xukDeJkwtYT17PIwAxavld4VVDUXrUeGccOnlqTLBHELXQALY+5oCYTdLFIgdPaRCg== X-Received: by 2002:a5d:6301:0:b0:205:cb42:74a5 with SMTP id i1-20020a5d6301000000b00205cb4274a5mr18242860wru.385.1650980513022; Tue, 26 Apr 2022 06:41:53 -0700 (PDT) Received: from radium.lan ([88.160.162.107]) by smtp.gmail.com with ESMTPSA id b6-20020adfd1c6000000b0020aac8a9946sm13628475wrd.47.2022.04.26.06.41.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Apr 2022 06:41:52 -0700 (PDT) From: Fabien Parent To: Rob Herring , Krzysztof Kozlowski , Matthias Brugger Cc: Fabien Parent , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 5/7] arm64: dts: mediatek: mt8195-demo: enable ethernet Date: Tue, 26 Apr 2022 15:41:03 +0200 Message-Id: <20220426134106.242353-6-fparent@baylibre.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220426134106.242353-1-fparent@baylibre.com> References: <20220426134106.242353-1-fparent@baylibre.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Enable ethernet on the MT8195 demo board. Signed-off-by: Fabien Parent --- arch/arm64/boot/dts/mediatek/mt8195-demo.dts | 108 +++++++++++++++++++ 1 file changed, 108 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-demo.dts b/arch/arm64/boot/dts/mediatek/mt8195-demo.dts index 08cab3b3943b..0b7985486e2a 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-demo.dts +++ b/arch/arm64/boot/dts/mediatek/mt8195-demo.dts @@ -80,6 +80,30 @@ optee_reserved: optee@43200000 { }; }; +ð { + phy-mode = "rgmii-rxid"; + phy-handle = <ð_phy>; + snps,reset-gpio = <&pio 93 GPIO_ACTIVE_HIGH>; + snps,reset-delays-us = <0 10000 10000>; + mediatek,tx-delay-ps = <2030>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <ð_default_pins>; + pinctrl-1 = <ð_sleep_pins>; + status = "okay"; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + eth_phy: phy@1 { + compatible = "ethernet-phy-id001c.c916"; + #phy-cells = <0>; + reg = <0x1>; + }; + }; +}; + &i2c6 { clock-frequency = <400000>; pinctrl-0 = <&i2c6_pins>; @@ -260,6 +284,90 @@ &mt6359_vsram_others_ldo_reg { }; &pio { + eth_default_pins: eth-default-pins { + pins-cc { + pinmux = , + , + , + ; + drive-strength = ; + }; + + pins-mdio { + pinmux = , + ; + input-enable; + }; + + pins-phy-reset { + pinmux = ; + }; + + pins-power { + pinmux = , + ; + output-high; + }; + + pins-rxd { + pinmux = , + , + , + ; + }; + + pins-txd { + pinmux = , + , + , + ; + drive-strength = ; + }; + }; + + eth_sleep_pins: eth-sleep-pins { + pins-cc { + pinmux = , + , + , + ; + }; + + pins-mdio { + pinmux = , + ; + input-disable; + bias-disable; + }; + + pins-phy-reset { + pinmux = ; + input-disable; + bias-disable; + }; + + pins-power { + pinmux = , + ; + input-disable; + bias-disable; + }; + + pins-rxd { + pinmux = , + , + , + ; + }; + + pins-txd { + pinmux = , + , + , + ; + }; + }; + gpio_keys_pins: gpio-keys-pins { pins { pinmux = ;