From patchwork Fri Apr 22 21:10:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 565054 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 991F7C433EF for ; Fri, 22 Apr 2022 22:16:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232528AbiDVWTo (ORCPT ); Fri, 22 Apr 2022 18:19:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52442 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233249AbiDVWS2 (ORCPT ); Fri, 22 Apr 2022 18:18:28 -0400 Received: from mail-lf1-x12d.google.com (mail-lf1-x12d.google.com [IPv6:2a00:1450:4864:20::12d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 63F5A32B24C for ; Fri, 22 Apr 2022 14:10:10 -0700 (PDT) Received: by mail-lf1-x12d.google.com with SMTP id p12so10817962lfs.5 for ; Fri, 22 Apr 2022 14:10:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ugzBs2Kot7nDRgqzctSCPbKbp3TBExEgizD4VqmQZYs=; b=DlYf+2aIG+rU/KGj8TxzZAi63Qq/dclbvL6hxYpSunyukKrNx2Gf76s/nHeDztAola 1OAkSC59p3yLixZG7oMeq7xhwYr51xJwzJYx5xncx+QMa4709e7FhVIQV59KKlMAQ2e4 5hlDNm9XEUaP50PA8ssIfOhD6kxovvcvYvifPZICdTisIskXD/cRaqbsDiF1m8bRW6Vn l1bIvxz4m8+2FL/M5OoDiT9FA/SM6BqChaXnVjrfDD18dgeQjzvwqFWSZhnlyTd/QfHw 1HlkP6gT8mp/rCP9SFu9OMBDtzapTf6Si91891RgQ+FLTAfPB9b8tLAaEZoIF63xmsXW QtwA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ugzBs2Kot7nDRgqzctSCPbKbp3TBExEgizD4VqmQZYs=; b=XHLlONTni4cJujpLbHvBMG62Xcr61aB6tdJQBDaTXrXZgziexuHWsrAkkLlk8MBpor CdT9K/LNh4vbLzKVNWXI00IOVeNBtg7/t6EPdzYwJW8ofgyMUMWIyP/T5iB/PBCrljL4 qR028Ki2x3GJ0X0qYaYAMQIt5s/rb5X5NYmqstfkUiKYOWCP+dWNgIYxpIzcjUfkX9YD 1EdryO5LS+8rNvJKRVH+JDK1UeO7AARo0b11JPXMJG/+kVzrhCh9Uwyp1PlcD6sz8djb 79NnKFnTgHFUxzpYrYf3w/ruIs/dGrCkh3nvuuswkErBHVWe9sBo+fSIAi1PozuFFAZu ZIwQ== X-Gm-Message-State: AOAM533lubjZjV3g/RDjW4E0NZ8D74AJ8Ppf01/vJchPGgRuHG9OczYY 9qDFbpXiVTVux3DQT4flm64riQ== X-Google-Smtp-Source: ABdhPJyFX2V/PTbKX0DremzFxHAy9NCacGDooP7NhmjEF5NEdeKhysGUH7SrLJGdzJQ3FBsNJs8GHw== X-Received: by 2002:a05:6512:32ca:b0:471:d0ba:4383 with SMTP id f10-20020a05651232ca00b00471d0ba4383mr4325572lfg.240.1650661808585; Fri, 22 Apr 2022 14:10:08 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id 6-20020ac24d46000000b0046bb728b873sm351240lfp.252.2022.04.22.14.10.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 14:10:08 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Stanimir Varbanov Cc: Bjorn Helgaas , Vinod Koul , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v2 5/7] arm: dts: qcom: stop using snps,dw-pcie falback Date: Sat, 23 Apr 2022 00:10:00 +0300 Message-Id: <20220422211002.2012070-6-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220422211002.2012070-1-dmitry.baryshkov@linaro.org> References: <20220422211002.2012070-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Qualcomm PCIe devices are not really compatible with the snps,dw-pcie. Unlike the generic IP core, they have special requirements regarding enabling clocks, toggling resets, using the PHY, etc. This is not to mention that platform snps-dw-pcie driver expects to find two IRQs declared, while Qualcomm platforms use just one. Acked-by: Krzysztof Kozlowski Signed-off-by: Dmitry Baryshkov --- arch/arm/boot/dts/qcom-apq8064.dtsi | 2 +- arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index a1c8ae516d21..ec2f98671a8c 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -1370,7 +1370,7 @@ gfx3d1: iommu@7d00000 { }; pcie: pci@1b500000 { - compatible = "qcom,pcie-apq8064", "snps,dw-pcie"; + compatible = "qcom,pcie-apq8064"; reg = <0x1b500000 0x1000>, <0x1b502000 0x80>, <0x1b600000 0x100>, diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi index a9d0566a3190..1e814dbe135e 100644 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi @@ -412,7 +412,7 @@ restart@4ab000 { }; pcie0: pci@40000000 { - compatible = "qcom,pcie-ipq4019", "snps,dw-pcie"; + compatible = "qcom,pcie-ipq4019"; reg = <0x40000000 0xf1d 0x40000f20 0xa8 0x80000 0x2000