From patchwork Thu Apr 21 09:00:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 564551 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1EA7BC43217 for ; Thu, 21 Apr 2022 09:00:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1387185AbiDUJDb (ORCPT ); Thu, 21 Apr 2022 05:03:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41462 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1387197AbiDUJD1 (ORCPT ); Thu, 21 Apr 2022 05:03:27 -0400 Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::223]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5758B1E3F9; Thu, 21 Apr 2022 02:00:23 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id BE0666000E; Thu, 21 Apr 2022 09:00:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1650531621; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=u01b1selyXe0jftTDu7r7t0Ht9P7I1540HtnYasaBwg=; b=ZGkRNZKOX3JtROBJD5zn/Mp7AfYXsbEiJcTPK7kfwuuXauHrxfYfMJq5WFmJETazxNIa8D jQDyCFgRW5B3Q+/KuFymvnzhqUkJH1MUIATKMRY4JT64cUCbeTBmhHZ422wgAsF7itgf80 CAdQ03ym3ZXltFC5i44YcbMGaD3FZA+qkX+/1JXgOdvnUciidR94XDb/txilXRM0PHZCri l+MTUm1WHzIMC1HyzvYPJ8Q4kdh1fogFNWrV3uQan4V4IZBynDNLtYqTkBBU6Voiu6fOEK EDKZRqicihZ82kwXjaizDESbRexch6CDEt3ugA5uLQJMytmCmRtiEdnUijNstQ== From: Miquel Raynal To: Alessandro Zummo , Alexandre Belloni , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , Michael Turquette , Stephen Boyd Cc: Miquel Raynal , linux-rtc@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Gareth Williams , Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger Subject: [PATCH v2 1/7] dt-bindings: rtc: rzn1: Describe the RZN1 RTC Date: Thu, 21 Apr 2022 11:00:10 +0200 Message-Id: <20220421090016.79517-2-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220421090016.79517-1-miquel.raynal@bootlin.com> References: <20220421090016.79517-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add new binding file for this RTC. Signed-off-by: Miquel Raynal --- .../bindings/rtc/renesas,rzn1-rtc.yaml | 65 +++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 Documentation/devicetree/bindings/rtc/renesas,rzn1-rtc.yaml diff --git a/Documentation/devicetree/bindings/rtc/renesas,rzn1-rtc.yaml b/Documentation/devicetree/bindings/rtc/renesas,rzn1-rtc.yaml new file mode 100644 index 000000000000..d0bd1ae2f9db --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/renesas,rzn1-rtc.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/renesas,rzn1-rtc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/N1 SoCs Real-Time Clock DT bindings + +maintainers: + - Miquel Raynal + +allOf: + - $ref: rtc.yaml# + +properties: + compatible: + items: + - enum: + - renesas,r9a06g032-rtc + - const: renesas,rzn1-rtc + + reg: + maxItems: 1 + + interrupts: + minItems: 3 + maxItems: 3 + + interrupt-names: + items: + - const: alarm + - const: timer + - const: pps + + clocks: + maxItems: 1 + + clock-names: + const: hclk + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + #include + #include + rtc@40006000 { + compatible = "renesas,r9a06g032-rtc", "renesas,rzn1-rtc"; + reg = <0x40006000 0x1000>; + interrupts = , + , + ; + interrupt-names = "alarm", "timer", "pps"; + clocks = <&sysctrl R9A06G032_HCLK_RTC>; + clock-names = "hclk"; + start-year = <2000>; + };