From patchwork Sat Apr 9 09:13:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas tanure X-Patchwork-Id: 559273 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4EAE4C433F5 for ; Sat, 9 Apr 2022 09:13:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241112AbiDIJP4 (ORCPT ); Sat, 9 Apr 2022 05:15:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60174 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241071AbiDIJPu (ORCPT ); Sat, 9 Apr 2022 05:15:50 -0400 Received: from mx0b-001ae601.pphosted.com (mx0b-001ae601.pphosted.com [67.231.152.168]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EDAC8F3A6B; Sat, 9 Apr 2022 02:13:43 -0700 (PDT) Received: from pps.filterd (m0077474.ppops.net [127.0.0.1]) by mx0b-001ae601.pphosted.com (8.17.1.5/8.16.1.2) with ESMTP id 2399CL4u024715; Sat, 9 Apr 2022 04:13:20 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=PODMain02222019; bh=0CFqoZxdKyNJco3f8odaQL1z1+afH8ZrsmpzaVKSkkk=; b=d9ljvpcii7rx3W5cnWkh67COicLG+QTgRgheOxwPVaEL1IHYPy9TigTuyrlDOnadNKeT trWNQhNsOJsya8oks8HwvI5ZGWloj0p+qe7393a8c7cntlcugiS4a+AlLq7q2VzJl/rC /p6VPHNvSnWll9pecjnOUZQ9znWNjb9VQLNiiQx81X5qliPRS3IJLonn8YGDO+IqXdIA /VHRyqcLdQSMGfas9Rz32hew2ib+qS55AajlTKvZu8KfDshzi1N7Gf9lCxcWsRi4m62U SGDWQp9K8ZVd+sak+xK5Y5Mrfg5INh8tD+qzuqnY14/m3NayqYWnpElAZ/dqxJu7NeLD 2A== Received: from ediex02.ad.cirrus.com ([84.19.233.68]) by mx0b-001ae601.pphosted.com (PPS) with ESMTPS id 3fb6py80ws-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT); Sat, 09 Apr 2022 04:13:20 -0500 Received: from EDIEX01.ad.cirrus.com (198.61.84.80) by EDIEX02.ad.cirrus.com (198.61.84.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Sat, 9 Apr 2022 10:13:18 +0100 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.2375.24 via Frontend Transport; Sat, 9 Apr 2022 10:13:18 +0100 Received: from aryzen.ad.cirrus.com (unknown [198.61.64.156]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id 4395A46C; Sat, 9 Apr 2022 09:13:18 +0000 (UTC) From: Lucas Tanure To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Jaroslav Kysela , Takashi Iwai CC: , , , , Lucas Tanure Subject: [PATCH v6 04/16] ALSA: hda: cs35l41: Fix I2S params comments Date: Sat, 9 Apr 2022 10:13:03 +0100 Message-ID: <20220409091315.1663410-5-tanureal@opensource.cirrus.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220409091315.1663410-1-tanureal@opensource.cirrus.com> References: <20220409091315.1663410-1-tanureal@opensource.cirrus.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: TU2mSL00G85Am8MD6LN6rC18-Jvjdi8G X-Proofpoint-GUID: TU2mSL00G85Am8MD6LN6rC18-Jvjdi8G X-Proofpoint-Spam-Reason: safe Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Fix clock and slot size comments Signed-off-by: Lucas Tanure --- sound/pci/hda/cs35l41_hda.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/pci/hda/cs35l41_hda.c b/sound/pci/hda/cs35l41_hda.c index e00ceaca79c0..d2addae8c085 100644 --- a/sound/pci/hda/cs35l41_hda.c +++ b/sound/pci/hda/cs35l41_hda.c @@ -17,11 +17,11 @@ #include "cs35l41_hda.h" static const struct reg_sequence cs35l41_hda_config[] = { - { CS35L41_PLL_CLK_CTRL, 0x00000430 }, // 3200000Hz, BCLK Input, PLL_REFCLK_EN = 1 + { CS35L41_PLL_CLK_CTRL, 0x00000430 }, // 3072000Hz, BCLK Input, PLL_REFCLK_EN = 1 { CS35L41_GLOBAL_CLK_CTRL, 0x00000003 }, // GLOBAL_FS = 48 kHz { CS35L41_SP_ENABLES, 0x00010000 }, // ASP_RX1_EN = 1 { CS35L41_SP_RATE_CTRL, 0x00000021 }, // ASP_BCLK_FREQ = 3.072 MHz - { CS35L41_SP_FORMAT, 0x20200200 }, // 24 bits, I2S, BCLK Slave, FSYNC Slave + { CS35L41_SP_FORMAT, 0x20200200 }, // 32 bits RX/TX slots, I2S, clk consumer { CS35L41_DAC_PCM1_SRC, 0x00000008 }, // DACPCM1_SRC = ASPRX1 { CS35L41_AMP_DIG_VOL_CTRL, 0x00000000 }, // AMP_VOL_PCM 0.0 dB { CS35L41_AMP_GAIN_CTRL, 0x00000084 }, // AMP_GAIN_PCM 4.5 dB