From patchwork Fri Apr 8 14:36:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 558982 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D8DF7C433FE for ; Fri, 8 Apr 2022 14:37:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236981AbiDHOjz (ORCPT ); Fri, 8 Apr 2022 10:39:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46418 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236985AbiDHOjy (ORCPT ); Fri, 8 Apr 2022 10:39:54 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CE2E4A66E3; Fri, 8 Apr 2022 07:37:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1649428669; x=1680964669; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Z2Bl5qGTo3dfoTtGTbFb0RM34Y/R4subC/+ygZpA6i0=; b=uOX24/jAkgNATrDxOkzAXgF5M0/q9Uiarbbn3eKjzXObpRxHfyWBOkTw EipKNbycKd958djp0shOkQJGCENwKtZUcVcM7bC9uKouYI+YoaFFCa+DR lgSnN5YKzta47qF5CshXJuEDJKo8d/ZErA39gPfZ5zBab6DNifa7gmGUy ruAs6pS+8wrmYH/jAivXz676nIWVLBStw5duND0iGOhNQCRR9GkzCWIPY vSKU4Gbt7PYVOT/6DnkPYtC8JmuHAju3Dk30Kbi9WunMvKY3LNcFF3fJk tYuMNC+6GhoIyOkuKn5kBpBJTTYhA3JNHsOXmpBVhb/+GGE/y2FKzSpxV A==; X-IronPort-AV: E=Sophos;i="5.90,245,1643698800"; d="scan'208";a="154925644" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 08 Apr 2022 07:37:49 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Fri, 8 Apr 2022 07:37:48 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Fri, 8 Apr 2022 07:37:45 -0700 From: Conor Dooley To: , , , , , , , , CC: , , , , , Conor Dooley Subject: [PATCH v1 2/7] dt-bindings: clk: mpfs: add defines for two new clocks Date: Fri, 8 Apr 2022 14:36:42 +0000 Message-ID: <20220408143646.3693104-3-conor.dooley@microchip.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220408143646.3693104-1-conor.dooley@microchip.com> References: <20220408143646.3693104-1-conor.dooley@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The RTC reference and MSSPLL were previously not documented or defined, as they were unused. Add their defines to the PolarFire SoC header. Reviewed-by: Daire McNamara Signed-off-by: Conor Dooley --- include/dt-bindings/clock/microchip,mpfs-clock.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/include/dt-bindings/clock/microchip,mpfs-clock.h b/include/dt-bindings/clock/microchip,mpfs-clock.h index 73f2a9324857..3cba46b9191f 100644 --- a/include/dt-bindings/clock/microchip,mpfs-clock.h +++ b/include/dt-bindings/clock/microchip,mpfs-clock.h @@ -1,15 +1,18 @@ /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ /* * Daire McNamara, - * Copyright (C) 2020 Microchip Technology Inc. All rights reserved. + * Copyright (C) 2020-2022 Microchip Technology Inc. All rights reserved. */ #ifndef _DT_BINDINGS_CLK_MICROCHIP_MPFS_H_ #define _DT_BINDINGS_CLK_MICROCHIP_MPFS_H_ +#define CLK_MSSPLL 34 + #define CLK_CPU 0 #define CLK_AXI 1 #define CLK_AHB 2 +#define CLK_RTCREF 33 #define CLK_ENVM 3 #define CLK_MAC0 4