From patchwork Fri Mar 25 16:53:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prasanna Vengateshan X-Patchwork-Id: 554126 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B6A71C433F5 for ; Fri, 25 Mar 2022 16:54:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354283AbiCYQzs (ORCPT ); Fri, 25 Mar 2022 12:55:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49380 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1377048AbiCYQzp (ORCPT ); Fri, 25 Mar 2022 12:55:45 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0F7B23ED0F; Fri, 25 Mar 2022 09:54:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1648227250; x=1679763250; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=uc/QWrMsi4Y5CzoHRYB83/Fr2NHNaFlU0o76Li4FnTM=; b=z89mNJvuksqYRARNa1zVv5kZfS1Dd5WMYARts+yGgtbl9Ia1Pj/JcFUn wqIZyt/xmqTh+ZfsxrMGg+6k8Vi3GJFsyLGmp4UainzD1Jgd3Rc3axWZ1 HTY1j/NyC2B0VIBLyWqQBaUOYIe4pTYB1kvC19k8tuxXdlxlPsweY4IzJ ie1pKCjJvuX58K913PutiNcwDmIkzA0PSJSV7Wn3/Tgqyg9q/gDxOxxce rPTj57sJ6YX1QwqT2GljreHXYy47dShgjGcHJQSHb1HkTWXUZ8SWkgdwG LSRPtYs1adU1ilfq1CxLHuEIDSDoPn+OhRtC0fApi0FwzsnWErHG5p8p6 Q==; X-IronPort-AV: E=Sophos;i="5.90,209,1643698800"; d="scan'208";a="153289847" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 25 Mar 2022 09:54:09 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Fri, 25 Mar 2022 09:53:57 -0700 Received: from CHE-LT-I21427LX.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Fri, 25 Mar 2022 09:53:52 -0700 From: Prasanna Vengateshan To: , , , CC: , , , , , , , , , , Subject: [RFC PATCH v11 net-next 01/10] dt-bindings: net: make internal-delay-ps based on phy-mode Date: Fri, 25 Mar 2022 22:23:32 +0530 Message-ID: <20220325165341.791013-2-prasanna.vengateshan@microchip.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220325165341.791013-1-prasanna.vengateshan@microchip.com> References: <20220325165341.791013-1-prasanna.vengateshan@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org *-internal-delay-ps properties would be applicable only for RGMII interface modes. It is changed as per the request, https://lore.kernel.org/netdev/d8e5f6a8-a7e1-dabd-f4b4-ea8ea21d0a1d@gmail.com/ Ran dt_binding_check to confirm nothing is broken. Signed-off-by: Prasanna Vengateshan Reviewed-by: Andrew Lunn --- .../bindings/net/ethernet-controller.yaml | 37 +++++++++++++------ 1 file changed, 25 insertions(+), 12 deletions(-) diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml index 34c5463abcec..dc86a6479a86 100644 --- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml @@ -123,12 +123,6 @@ properties: and is useful for determining certain configuration settings such as flow control thresholds. - rx-internal-delay-ps: - description: | - RGMII Receive Clock Delay defined in pico seconds. - This is used for controllers that have configurable RX internal delays. - If this property is present then the MAC applies the RX delay. - sfp: $ref: /schemas/types.yaml#/definitions/phandle description: @@ -140,12 +134,6 @@ properties: The size of the controller\'s transmit fifo in bytes. This is used for components that can have configurable fifo sizes. - tx-internal-delay-ps: - description: | - RGMII Transmit Clock Delay defined in pico seconds. - This is used for controllers that have configurable TX internal delays. - If this property is present then the MAC applies the TX delay. - managed: description: Specifies the PHY management type. If auto is set and fixed-link @@ -222,6 +210,31 @@ properties: required: - speed +allOf: + - if: + properties: + phy-mode: + contains: + enum: + - rgmii + - rgmii-rxid + - rgmii-txid + - rgmii-id + then: + properties: + rx-internal-delay-ps: + description: + RGMII Receive Clock Delay defined in pico seconds.This is + used for controllers that have configurable RX internal + delays. If this property is present then the MAC applies + the RX delay. + tx-internal-delay-ps: + description: + RGMII Transmit Clock Delay defined in pico seconds.This is + used for controllers that have configurable TX internal + delays. If this property is present then the MAC applies + the TX delay. + additionalProperties: true ...