| Message ID | 20220325154048.467245-5-quic_jaehyoo@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | None | expand |
On 3/27/2022 8:17 PM, Andrew Jeffery wrote: > > > On Sat, 26 Mar 2022, at 02:10, Jae Hyun Yoo wrote: >> From: Johnny Huang <johnny_huang@aspeedtech.com> >> >> Add FWSPIDQ2 and FWSPIDQ3 group to support AST2600 FW SPI quad mode. >> These pins can be used with dedicated FW SPI pins - FWSPICS0#, >> FWSPICK, FWSPIMOSI and FWSPIMISO. >> >> Signed-off-by: Johnny Huang <johnny_huang@aspeedtech.com> >> Signed-off-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com> >> --- >> Changes in v2: >> * None. >> >> arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi | 5 +++++ >> 1 file changed, 5 insertions(+) >> >> diff --git a/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi >> b/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi >> index 06d60a8540e9..47c3fb137cbc 100644 >> --- a/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi >> +++ b/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi >> @@ -117,6 +117,11 @@ pinctrl_fwspid_default: fwspid_default { >> groups = "FWSPID"; >> }; >> >> + pinctrl_fwqspi_default: fwqspi_default { >> + function = "FWQSPI"; >> + groups = "FWQSPI"; >> + }; >> + > > This is okay once you update the binding documentation. Will add a bindings patch in v3. Thanks, Jae > Andrew
diff --git a/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi b/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi index 06d60a8540e9..47c3fb137cbc 100644 --- a/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi +++ b/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi @@ -117,6 +117,11 @@ pinctrl_fwspid_default: fwspid_default { groups = "FWSPID"; }; + pinctrl_fwqspi_default: fwqspi_default { + function = "FWQSPI"; + groups = "FWQSPI"; + }; + pinctrl_fwspiwp_default: fwspiwp_default { function = "FWSPIWP"; groups = "FWSPIWP";