From patchwork Thu Mar 17 09:19:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Chiu X-Patchwork-Id: 552359 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E469C433F5 for ; Thu, 17 Mar 2022 09:21:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231551AbiCQJWg (ORCPT ); Thu, 17 Mar 2022 05:22:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60234 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231771AbiCQJWg (ORCPT ); Thu, 17 Mar 2022 05:22:36 -0400 Received: from mail-pj1-x1033.google.com (mail-pj1-x1033.google.com [IPv6:2607:f8b0:4864:20::1033]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E273A48882 for ; Thu, 17 Mar 2022 02:21:19 -0700 (PDT) Received: by mail-pj1-x1033.google.com with SMTP id bx24-20020a17090af49800b001c6872a9e4eso826437pjb.5 for ; Thu, 17 Mar 2022 02:21:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=00f+kRqIByvWTuoSfawk8+MFKoCBfn6Hxvgo5w11mT4=; b=DU+Xf+EGgdElVWDUA0yjAZFpXDdhGuPFQ7j5AV4gCkZeHUqjXWHhm9Fw8gJjeNv7yO Kw+HPLHH5x+Fiovlb+6p/dJdqMALIGnko2pNgPrqjhSm0IfL/Gw32HAzi+GJrtCSB4TE YP8dpdPdQ2m9fAmFLpRc/v936AH00+YbE4E7aTlRLx+NAvIkcSn7OaSLhqFTKZT/nmoN nkYllwjl5+sHo6HgWPh5SjvbyJ4WGA9TnFhxHVCUnxhHjRpdmEjNeA+ocz8o29EyKzsp V/BNgskPZRt7M5twtV90zxMhlMJKc+fXmRDbsTAVv8kMPxzF4whQp20XD/JO2lrR/zOS /DzQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=00f+kRqIByvWTuoSfawk8+MFKoCBfn6Hxvgo5w11mT4=; b=ceK0eHNiHpBw5F7iu680EjX5HZvkOliql38qaI7gi42Om1BpDMuecdzS5IindAfZm1 jkDHQx7vQCNa1ly8jpzJBS/DDGIUlafzUhmP5nzVZs9doF2Zkaily5ee2PfJGaKUjtXd jwm//DzLf+jz/3drKXVumOy+Vu6ADxP6vuOKLT4nY6b92oFxBP7bTCLBwcx/zZWJ9fT4 Fi/E+I52nh39R6d0Z0WhgRnE9SBZMiAO7e9xA4Sg+XNY9x+dTW/WjhX3NG0XOZOdmbbd dWjhppWFfoKajJHzATs+y9a5d7CMCbNEVoYfuyX5kPKJQNSE9/2mSYAB15U/U/i0cPVa CMeA== X-Gm-Message-State: AOAM532pFWQXk8mvkKFpRYHxrnC8fL7eMp70e33qEOLovosGsaKMrjpy rgfL7m0egVW4jebOuLpEyI7vjQ== X-Google-Smtp-Source: ABdhPJwmYksWZBSHUGtcqtQOeQnfwX3VEqnqKkZvYqw3GjwRv5P472XI1XsLEuxMcMLRAjZwDapwew== X-Received: by 2002:a17:90a:17ab:b0:1bf:9519:fe86 with SMTP id q40-20020a17090a17ab00b001bf9519fe86mr14837606pja.25.1647508879412; Thu, 17 Mar 2022 02:21:19 -0700 (PDT) Received: from archlinux.internal.sifive.com (59-124-168-89.hinet-ip.hinet.net. [59.124.168.89]) by smtp.gmail.com with ESMTPSA id x9-20020a056a00188900b004f7454e4f53sm6309056pfh.37.2022.03.17.02.21.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Mar 2022 02:21:19 -0700 (PDT) From: Andy Chiu To: davem@davemloft.net, kuba@kernel.org, michal.simek@xilinx.com, linux@armlinux.org.uk, robert.hancock@calian.com, andrew@lunn.ch, netdev@vger.kernel.org, devicetree@vger.kernel.org Cc: Andy Chiu , Greentime Hu Subject: [PATCH v2 1/2] dt-bindings: net: xilinx_axienet: add pcs-handle attribute Date: Thu, 17 Mar 2022 17:19:25 +0800 Message-Id: <20220317091926.86765-1-andy.chiu@sifive.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Document the new pcs-handle attribute to support connecting to an external PHY in SGMII or 1000Base-X modes through the internal PCS/PMA PHY. Signed-off-by: Andy Chiu Reviewed-by: Greentime Hu --- Documentation/devicetree/bindings/net/xilinx_axienet.txt | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/net/xilinx_axienet.txt b/Documentation/devicetree/bindings/net/xilinx_axienet.txt index b8e4894bc634..2a9a3a90eb63 100644 --- a/Documentation/devicetree/bindings/net/xilinx_axienet.txt +++ b/Documentation/devicetree/bindings/net/xilinx_axienet.txt @@ -68,6 +68,11 @@ Optional properties: required through the core's MDIO interface (i.e. always, unless the PHY is accessed through a different bus). + - pcs-handle: Phandle to the internal PCS/PMA PHY, if a fixed external PHY + is tied to it in SGMII or 1000Base-X modes. This is not + required for SFP connection. The driver would use phy-handle + to reference the PCS/PMA PHY in such case. + Example: axi_ethernet_eth: ethernet@40c00000 { compatible = "xlnx,axi-ethernet-1.00.a";