From patchwork Sat Feb 26 20:44:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 546517 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DBD41C433EF for ; Sat, 26 Feb 2022 20:44:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229600AbiBZUoy (ORCPT ); Sat, 26 Feb 2022 15:44:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60302 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229575AbiBZUox (ORCPT ); Sat, 26 Feb 2022 15:44:53 -0500 Received: from mxout3.routing.net (mxout3.routing.net [IPv6:2a03:2900:1:a::8]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EB17073049; Sat, 26 Feb 2022 12:44:15 -0800 (PST) Received: from mxbox2.masterlogin.de (unknown [192.168.10.89]) by mxout3.routing.net (Postfix) with ESMTP id 4571B601F1; Sat, 26 Feb 2022 20:44:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1645908253; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=0N0goLHEHVwY3QonWnFbfubeloBYSPi4VBY9bSai/Vg=; b=b608P4es0zETIhPafD7rMubJK8D7zMwmhpg2PKZ3qV2EdS+zpMlj9vZpGwyadu5qNnLpXa BG0QEiCuKl7pvvwWuxpjnGaano7ka3jJ52mcjj8MHGoSzlyG5k/jGLwE0k1g5xwY8s8LN/ EsH41HBsgP9pvDkawhQ3aREg0YF60So= Received: from localhost.localdomain (fttx-pool-80.245.79.12.bambit.de [80.245.79.12]) by mxbox2.masterlogin.de (Postfix) with ESMTPSA id 89B4F1001D3; Sat, 26 Feb 2022 20:44:12 +0000 (UTC) From: Frank Wunderlich To: linux-ide@vger.kernel.org Cc: Frank Wunderlich , Damien Le Moal , Rob Herring , Hans de Goede , Jens Axboe , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Peter Geis Subject: [PATCH] dt-bindings: Convert ahci-platform DT bindings to yaml Date: Sat, 26 Feb 2022 21:44:04 +0100 Message-Id: <20220226204404.109867-1-linux@fw-web.de> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Mail-ID: 99e6561b-5b02-45f0-93e1-2e578037435f Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Frank Wunderlich Create a yaml file for dtbs_check from the old txt binding. Signed-off-by: Frank Wunderlich --- .../devicetree/bindings/ata/ahci-platform.txt | 79 ----------- .../bindings/ata/ahci-platform.yaml | 134 ++++++++++++++++++ 2 files changed, 134 insertions(+), 79 deletions(-) delete mode 100644 Documentation/devicetree/bindings/ata/ahci-platform.txt create mode 100644 Documentation/devicetree/bindings/ata/ahci-platform.yaml diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt b/Documentation/devicetree/bindings/ata/ahci-platform.txt deleted file mode 100644 index 77091a277642..000000000000 --- a/Documentation/devicetree/bindings/ata/ahci-platform.txt +++ /dev/null @@ -1,79 +0,0 @@ -* AHCI SATA Controller - -SATA nodes are defined to describe on-chip Serial ATA controllers. -Each SATA controller should have its own node. - -It is possible, but not required, to represent each port as a sub-node. -It allows to enable each port independently when dealing with multiple -PHYs. - -Required properties: -- compatible : compatible string, one of: - - "brcm,iproc-ahci" - - "hisilicon,hisi-ahci" - - "cavium,octeon-7130-ahci" - - "ibm,476gtr-ahci" - - "marvell,armada-380-ahci" - - "marvell,armada-3700-ahci" - - "snps,dwc-ahci" - - "snps,spear-ahci" - - "generic-ahci" -- interrupts : -- reg : - -Please note that when using "generic-ahci" you must also specify a SoC specific -compatible: - compatible = "manufacturer,soc-model-ahci", "generic-ahci"; - -Optional properties: -- dma-coherent : Present if dma operations are coherent -- clocks : a list of phandle + clock specifier pairs -- resets : a list of phandle + reset specifier pairs -- target-supply : regulator for SATA target power -- phy-supply : regulator for PHY power -- phys : reference to the SATA PHY node -- phy-names : must be "sata-phy" -- ahci-supply : regulator for AHCI controller -- ports-implemented : Mask that indicates which ports that the HBA supports - are available for software to use. Useful if PORTS_IMPL - is not programmed by the BIOS, which is true with - some embedded SOC's. - -Required properties when using sub-nodes: -- #address-cells : number of cells to encode an address -- #size-cells : number of cells representing the size of an address - -Sub-nodes required properties: -- reg : the port number -And at least one of the following properties: -- phys : reference to the SATA PHY node -- target-supply : regulator for SATA target power - -Examples: - sata@ffe08000 { - compatible = "snps,spear-ahci"; - reg = <0xffe08000 0x1000>; - interrupts = <115>; - }; - -With sub-nodes: - sata@f7e90000 { - compatible = "marvell,berlin2q-achi", "generic-ahci"; - reg = <0xe90000 0x1000>; - interrupts = ; - clocks = <&chip CLKID_SATA>; - #address-cells = <1>; - #size-cells = <0>; - - sata0: sata-port@0 { - reg = <0>; - phys = <&sata_phy 0>; - target-supply = <®_sata0>; - }; - - sata1: sata-port@1 { - reg = <1>; - phys = <&sata_phy 1>; - target-supply = <®_sata1>;; - }; - }; diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.yaml b/Documentation/devicetree/bindings/ata/ahci-platform.yaml new file mode 100644 index 000000000000..b5bef93215c0 --- /dev/null +++ b/Documentation/devicetree/bindings/ata/ahci-platform.yaml @@ -0,0 +1,134 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ata/ahci-platform.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: AHCI SATA Controller +description: + SATA nodes are defined to describe on-chip Serial ATA controllers. + Each SATA controller should have its own node. + + It is possible, but not required, to represent each port as a sub-node. + It allows to enable each port independently when dealing with multiple + PHYs. + +maintainers: + - Hans de Goede + - Jens Axboe + +properties: + compatible: + enum: + - brcm,iproc-ahci + - hisilicon,hisi-ahci + - cavium,octeon-7130-ahci + - ibm,476gtr-ahci + - marvell,armada-380-ahci + - marvell,armada-3700-ahci + - snps,dwc-ahci + - snps,spear-ahci + - generic-ahci + + ahci-supply: + description: + regulator for AHCI controller + + dma-coherent: + description: + Present if dma operations are coherent + + clocks: + minItems: 1 + maxItems: 3 + + interrupts: + minItems: 1 + + phy-supply: + description: + regulator for PHY power + + phys: + minItems: 1 + + phy-names: + minItems: 1 + + ports-implemented: + description: + Mask that indicates which ports that the HBA supports + are available for software to use. Useful if PORTS_IMPL + is not programmed by the BIOS, which is true with + some embedded SOC's. + minItems: 1 + + reg: + maxItems: 1 + + resets: + minItems: 1 + + target-supply: + description: + regulator for SATA target power + +required: + - compatible + - reg + - interrupts + +patternProperties: + "^sata-port@[0-9]+$": + type: object + description: + Subnode with configuration of the Ports. + + properties: + reg: + maxItems: 1 + + phys: + minItems: 1 + + target-supply: + description: + regulator for SATA target power + + required: + - reg + + anyOf: + - required: [ phys ] + - required: [ target-supply ] + +additionalProperties: true + +examples: + - | + sata@ffe08000 { + compatible = "snps,spear-ahci"; + reg = <0xffe08000 0x1000>; + interrupts = <115>; + }; + - | + sata@f7e90000 { + compatible = "marvell,berlin2q-achi", "generic-ahci"; + reg = <0xe90000 0x1000>; + interrupts = ; + clocks = <&chip CLKID_SATA>; + #address-cells = <1>; + #size-cells = <0>; + + sata0: sata-port@0 { + reg = <0>; + phys = <&sata_phy 0>; + target-supply = <®_sata0>; + }; + + sata1: sata-port@1 { + reg = <1>; + phys = <&sata_phy 1>; + target-supply = <®_sata1>;; + }; + };