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[23.128.96.18]) by mx.google.com with ESMTP id h7si1158223pgq.411.2021.10.07.18.25.56; Thu, 07 Oct 2021 18:25:57 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Tv3hh4qq; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242248AbhJHB1q (ORCPT + 7 others); Thu, 7 Oct 2021 21:27:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38906 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239918AbhJHB1n (ORCPT ); Thu, 7 Oct 2021 21:27:43 -0400 Received: from mail-lf1-x132.google.com (mail-lf1-x132.google.com [IPv6:2a00:1450:4864:20::132]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DA106C0613EE for ; Thu, 7 Oct 2021 18:25:42 -0700 (PDT) Received: by mail-lf1-x132.google.com with SMTP id i24so30956218lfj.13 for ; Thu, 07 Oct 2021 18:25:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=tFp/7m8gryHUoq+f87cJCv5Sr9eZMzxJXjwT80w0C30=; b=Tv3hh4qqM6YTzNxLirtrWtJHI2KZWlyziAvAo2x1Fn3mC4o1c/5cqgcDqUEXyEQQfb n/Szj1rkAiH8cT3FlLrbP8mtb36kowJku+OJ9erYxIufpJWBkq8mrtnrFQfy0LELDS+C lMI477cQ3HGoiA9xkVim8SJ3v18Cm7F4GREaj/vyT/IASXUDKtw/EYhyy6qC4zRj2Oss JVVTnWOhPm/O1KhDx58klUyBmaDKvg5lRc2NyLcY1BxfrKdqgRvx1rQP6UNAky76k1Sp qu4hSre2FwLEKmdpEAIMDfWmf5sv9vaJ5GTsxRw1jrD63zb13EXBbCqce3xYIatOUxJd g+aQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tFp/7m8gryHUoq+f87cJCv5Sr9eZMzxJXjwT80w0C30=; b=KljzgcaU8lI0ps6x0GTyOmrfNoBByPDrMRh8YZuatS1Cs8uR2hKJNHAqQAaV0l/6TN 5KQXEIcPSxW+wZrZ3FmY7DsO4p2r9gE/yYN38olXeZdLtog6hHXsLszyL9g+9hPbwWWN aMMWDrEu+Po1F3XfyqhPeJQxY+2RLaq7H0Bp/bNmWra38LCH82egmi5FVNPpn/zr+mRr M2XlxppvDCHZxe70ItPaDhMfSLU6PR0nOZ/4SqzwMpDvZVWaHRGnNHihlE8aBt2eMOuS fxJZOTQ9ENIhDXNlL2+esQL9iMellffN/ELdmS/1gTnmTTE3IcZ1RoEDc+/9v9kMfv17 Kang== X-Gm-Message-State: AOAM533dTOXKk4JTEZBDb8q40R75FWYTAg+jfjYQzIrVvu43mb0mNDiV bARLgsqh5IxyPmbQYDCTfYGBdQ== X-Received: by 2002:a2e:a5c8:: with SMTP id n8mr345526ljp.367.1633656341223; Thu, 07 Oct 2021 18:25:41 -0700 (PDT) Received: from umbar.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id s4sm112875ljp.115.2021.10.07.18.25.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Oct 2021 18:25:40 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Linus Walleij , Rob Herring Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v3 20/25] ARM: dts: qcom-msm8660: add interrupt controller properties Date: Fri, 8 Oct 2021 04:25:19 +0300 Message-Id: <20211008012524.481877-21-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211008012524.481877-1-dmitry.baryshkov@linaro.org> References: <20211008012524.481877-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Now that the pmic-mpp is a proper hierarchical IRQ chip, add interrupt controller properties ('interrupt-controller' and '#interrupt-cells'). The interrupts property is no longer needed so remove it. Signed-off-by: Dmitry Baryshkov --- arch/arm/boot/dts/qcom-msm8660.dtsi | 16 ++-------------- 1 file changed, 2 insertions(+), 14 deletions(-) -- 2.30.2 diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi index d404d386d392..21cb58ab68ac 100644 --- a/arch/arm/boot/dts/qcom-msm8660.dtsi +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi @@ -308,20 +308,8 @@ pm8058_mpps: mpps@50 { gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pm8058_mpps 0 0 12>; - interrupt-parent = <&pm8058>; - interrupts = - <128 IRQ_TYPE_NONE>, - <129 IRQ_TYPE_NONE>, - <130 IRQ_TYPE_NONE>, - <131 IRQ_TYPE_NONE>, - <132 IRQ_TYPE_NONE>, - <133 IRQ_TYPE_NONE>, - <134 IRQ_TYPE_NONE>, - <135 IRQ_TYPE_NONE>, - <136 IRQ_TYPE_NONE>, - <137 IRQ_TYPE_NONE>, - <138 IRQ_TYPE_NONE>, - <139 IRQ_TYPE_NONE>; + interrupt-controller; + #interrupt-cells = <2>; }; pwrkey@1c {