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[66.90.148.213]) by smtp.googlemail.com with ESMTPSA id s29sm4236628otg.60.2021.10.06.09.43.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Oct 2021 09:43:49 -0700 (PDT) From: Rob Herring To: Russell King , James Morse , Catalin Marinas , Will Deacon , Guo Ren , Jonas Bonn , Stefan Kristiansson , Stafford Horne , Michael Ellerman , Paul Walmsley , Palmer Dabbelt , Albert Ou , Yoshinori Sato , Rich Felker , x86@kernel.org, Greg Kroah-Hartman Cc: Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com, Benjamin Herrenschmidt , Paul Mackerras , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , "Rafael J. Wysocki" , Frank Rowand , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-csky@vger.kernel.org, openrisc@lists.librecores.org, linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org, linux-sh@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 08/12] riscv: Use of_get_cpu_hwid() Date: Wed, 6 Oct 2021 11:43:28 -0500 Message-Id: <20211006164332.1981454-9-robh@kernel.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211006164332.1981454-1-robh@kernel.org> References: <20211006164332.1981454-1-robh@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Replace open coded parsing of CPU nodes' 'reg' property with of_get_cpu_hwid(). Cc: Paul Walmsley Cc: Palmer Dabbelt Cc: Albert Ou Cc: linux-riscv@lists.infradead.org Signed-off-by: Rob Herring --- arch/riscv/kernel/cpu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -- 2.30.2 diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c index 6d59e6906fdd..f13b2c9ea912 100644 --- a/arch/riscv/kernel/cpu.c +++ b/arch/riscv/kernel/cpu.c @@ -22,7 +22,8 @@ int riscv_of_processor_hartid(struct device_node *node) return -ENODEV; } - if (of_property_read_u32(node, "reg", &hart)) { + hart = of_get_cpu_hwid(node, 0); + if (hart == ~0U) { pr_warn("Found CPU without hart ID\n"); return -ENODEV; }