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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id k6sm727416otf.80.2021.09.30.11.19.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Sep 2021 11:19:24 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Rob Herring , Frank Rowand Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Chris Lew , Deepak Kumar Singh Subject: [PATCH v2 1/4] dt-bindings: sram: Document qcom,rpm-msg-ram Date: Thu, 30 Sep 2021 11:21:08 -0700 Message-Id: <20210930182111.57353-2-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210930182111.57353-1-bjorn.andersson@linaro.org> References: <20210930182111.57353-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The Qualcomm SMEM binding always depended on a reference to a SRAM node of compatible "qcom,rpm-msg-ram", document this as part of the SRAM binding. The SRAM is consumed as a whole and not split up using subnodes, so properties related to this are not required. Signed-off-by: Bjorn Andersson --- Changes since v1: - New patch, to resolve issue with the existing qcom,smem example Documentation/devicetree/bindings/sram/sram.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) -- 2.29.2 Acked-by: Rob Herring diff --git a/Documentation/devicetree/bindings/sram/sram.yaml b/Documentation/devicetree/bindings/sram/sram.yaml index 3eda5049d183..e3311b54db33 100644 --- a/Documentation/devicetree/bindings/sram/sram.yaml +++ b/Documentation/devicetree/bindings/sram/sram.yaml @@ -31,6 +31,7 @@ properties: - amlogic,meson-gxbb-sram - arm,juno-sram-ns - atmel,sama5d2-securam + - qcom,rpm-msg-ram - rockchip,rk3288-pmu-sram reg: @@ -135,7 +136,9 @@ if: properties: compatible: contains: - const: rockchip,rk3288-pmu-sram + enum: + - qcom,rpm-msg-ram + - rockchip,rk3288-pmu-sram else: required: