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[80.251.214.228]) by smtp.gmail.com with ESMTPSA id t68sm9714498pgc.59.2021.09.13.20.20.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Sep 2021 20:20:51 -0700 (PDT) From: Shawn Guo To: Stephen Boyd Cc: Rob Herring , Bjorn Andersson , Loic Poulain , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Shawn Guo Subject: [PATCH 1/2] dt-bindings: clk: qcom: Add QCM2290 Global Clock Controller bindings Date: Tue, 14 Sep 2021 11:20:40 +0800 Message-Id: <20210914032041.6547-2-shawn.guo@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210914032041.6547-1-shawn.guo@linaro.org> References: <20210914032041.6547-1-shawn.guo@linaro.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org It adds device tree bindings for QCM2290 Global Clock Controller. Signed-off-by: Shawn Guo --- .../bindings/clock/qcom,gcc-qcm2290.yaml | 72 +++++++++++++++++++ 1 file changed, 72 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-qcm2290.yaml diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-qcm2290.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-qcm2290.yaml new file mode 100644 index 000000000000..f8130d8ce259 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-qcm2290.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,gcc-qcm2290.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Global Clock & Reset Controller Binding for QCM2290 + +maintainers: + - Shawn Guo + +description: | + Qualcomm global clock control module which supports the clocks, resets and + power domains on QCM2290. + + See also: + - dt-bindings/clock/qcom,gcc-qcm2290.h + +properties: + compatible: + const: qcom,gcc-qcm2290 + + clocks: + items: + - description: Board XO source + - description: Sleep clock source + + clock-names: + items: + - const: bi_tcxo + - const: sleep_clk + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + + '#power-domain-cells': + const: 1 + + reg: + maxItems: 1 + + protected-clocks: + description: + Protected clock specifier list as per common clock binding. + +required: + - compatible + - clocks + - clock-names + - reg + - '#clock-cells' + - '#reset-cells' + - '#power-domain-cells' + +additionalProperties: false + +examples: + - | + #include + clock-controller@1400000 { + compatible = "qcom,gcc-qcm2290"; + reg = <0x01400000 0x1f0000>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + clock-names = "bi_tcxo", "sleep_clk"; + clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&sleep_clk>; + }; +...