From patchwork Mon Aug 9 05:19:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tinghan Shen X-Patchwork-Id: 494069 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9715DC43216 for ; Mon, 9 Aug 2021 05:20:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 79B1461056 for ; Mon, 9 Aug 2021 05:20:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233119AbhHIFUb (ORCPT ); Mon, 9 Aug 2021 01:20:31 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:58010 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S232991AbhHIFU2 (ORCPT ); Mon, 9 Aug 2021 01:20:28 -0400 X-UUID: 7e039ee10f8f42e2aa4f9779c21ab0bc-20210809 X-UUID: 7e039ee10f8f42e2aa4f9779c21ab0bc-20210809 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 2043705994; Mon, 09 Aug 2021 13:20:03 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs02n2.mediatek.inc (172.21.101.101) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 9 Aug 2021 13:20:01 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 9 Aug 2021 13:20:02 +0800 From: Tinghan Shen To: , , , , , , , , , , , , CC: , , , , , Tinghan Shen Subject: [PATCH v6 1/6] dt-bindings: remoteproc: mediatek: Add binding for mt8195 scp Date: Mon, 9 Aug 2021 13:19:54 +0800 Message-ID: <20210809051959.31136-2-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.15.GIT In-Reply-To: <20210809051959.31136-1-tinghan.shen@mediatek.com> References: <20210809051959.31136-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add mt8195 compatible to binding document. The description of required properties are also modified to reflect the hardware change between mt8183 and mt8195. The mt8195 doesn't have to control the scp clock on kernel side. Signed-off-by: Tinghan Shen Acked-by: Rob Herring --- Documentation/devicetree/bindings/remoteproc/mtk,scp.txt | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/mtk,scp.txt b/Documentation/devicetree/bindings/remoteproc/mtk,scp.txt index 3f5f78764b60..d64466eefbe3 100644 --- a/Documentation/devicetree/bindings/remoteproc/mtk,scp.txt +++ b/Documentation/devicetree/bindings/remoteproc/mtk,scp.txt @@ -5,13 +5,15 @@ This binding provides support for ARM Cortex M4 Co-processor found on some Mediatek SoCs. Required properties: -- compatible Should be "mediatek,mt8183-scp" +- compatible Should be one of: + "mediatek,mt8183-scp" + "mediatek,mt8195-scp" - reg Should contain the address ranges for memory regions: SRAM, CFG, and L1TCM. - reg-names Contains the corresponding names for the memory regions: "sram", "cfg", and "l1tcm". -- clocks Clock for co-processor (See: ../clock/clock-bindings.txt) -- clock-names Contains the corresponding name for the clock. This +- clocks Required by mt8183. Clock for co-processor (See: ../clock/clock-bindings.txt) +- clock-names Required by mt8183. Contains the corresponding name for the clock. This should be named "main". Subnodes