From patchwork Tue Aug 3 17:51:09 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prabhakar Mahadev Lad X-Patchwork-Id: 491076 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UPPERCASE_50_75, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01917C19F31 for ; Tue, 3 Aug 2021 17:51:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DEF5861040 for ; Tue, 3 Aug 2021 17:51:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238428AbhHCRvr (ORCPT ); Tue, 3 Aug 2021 13:51:47 -0400 Received: from relmlor2.renesas.com ([210.160.252.172]:30078 "EHLO relmlie6.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S238316AbhHCRvq (ORCPT ); Tue, 3 Aug 2021 13:51:46 -0400 X-IronPort-AV: E=Sophos;i="5.84,292,1620658800"; d="scan'208";a="89686392" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 04 Aug 2021 02:51:34 +0900 Received: from localhost.localdomain (unknown [10.226.36.204]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 7E5D640BFAAE; Wed, 4 Aug 2021 02:51:32 +0900 (JST) From: Lad Prabhakar To: Geert Uytterhoeven , Thomas Gleixner , Marc Zyngier , Rob Herring , Linus Walleij , Magnus Damm , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Prabhakar , Biju Das , Lad Prabhakar Subject: [RFC PATCH 4/4] arm64: dts: renesas: r9a07g044: Add IRQC node to SoC DTSI Date: Tue, 3 Aug 2021 18:51:09 +0100 Message-Id: <20210803175109.1729-5-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210803175109.1729-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20210803175109.1729-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add IRQC node to R9A07G044 (RZ/G2L) SoC DTSI. Signed-off-by: Lad Prabhakar --- arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 58 ++++++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi index 339646843415..c45aa6d2364e 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi @@ -95,6 +95,8 @@ pinctrl: pin-controller@11030000 { compatible = "renesas,r9a07g044-pinctrl"; reg = <0 0x11030000 0 0x10000>; + interrupt-parent = <&irqc>; + interrupt-controller; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pinctrl 0 0 392>; @@ -410,6 +412,62 @@ status = "disabled"; }; + irqc: interrupt-controller@110a0000 { + compatible = "renesas,r9a07g044-irqc", + "renesas,rzg2l-irqc"; + #interrupt-cells = <2>; + #address-cells = <0>; + interrupt-controller; + reg = <0 0x110a0000 0 0x10000>; + interrupts = + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + clocks = <&cpg CPG_MOD R9A07G044_IA55_CLK>, + <&cpg CPG_MOD R9A07G044_IA55_PCLK>; + clock-names = "clk", "pclk"; + power-domains = <&cpg>; + resets = <&cpg R9A07G044_IA55_RESETN>; + }; + dmac: dma-controller@11820000 { compatible = "renesas,r9a07g044-dmac", "renesas,rz-dmac";