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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id q20sm872910otv.50.2021.07.24.21.02.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 24 Jul 2021 21:02:27 -0700 (PDT) From: Bjorn Andersson To: Bjorn Helgaas , Rob Herring , Stanimir Varbanov , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wil?= =?utf-8?q?czy=C5=84ski?= Cc: linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/3] PCI: qcom: Add sc8180x compatible Date: Sat, 24 Jul 2021 21:00:38 -0700 Message-Id: <20210725040038.3966348-4-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210725040038.3966348-1-bjorn.andersson@linaro.org> References: <20210725040038.3966348-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The SC8180x platform comes with 4 PCIe controllers, typically used for things such as NVME storage or connecting a SDX55 5G modem. Add a compatible for this, that just reuses the 1.9.0 ops. Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/pci/qcom,pcie.txt | 5 +++-- drivers/pci/controller/dwc/pcie-qcom.c | 1 + 2 files changed, 4 insertions(+), 2 deletions(-) -- 2.29.2 Acked-by: Rob Herring diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt b/Documentation/devicetree/bindings/pci/qcom,pcie.txt index 3f646875f8c2..a0ae024c2d0c 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt @@ -12,6 +12,7 @@ - "qcom,pcie-ipq4019" for ipq4019 - "qcom,pcie-ipq8074" for ipq8074 - "qcom,pcie-qcs404" for qcs404 + - "qcom,pcie-sc8180x" for sc8180x - "qcom,pcie-sdm845" for sdm845 - "qcom,pcie-sm8250" for sm8250 - "qcom,pcie-ipq6018" for ipq6018 @@ -156,7 +157,7 @@ - "pipe" PIPE clock - clock-names: - Usage: required for sm8250 + Usage: required for sc8180x and sm8250 Value type: Definition: Should contain the following entries - "aux" Auxiliary clock @@ -245,7 +246,7 @@ - "ahb" AHB reset - reset-names: - Usage: required for sdm845 and sm8250 + Usage: required for sc8180x, sdm845 and sm8250 Value type: Definition: Should contain the following entries - "pci" PCIe core reset diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index 8adcbb718832..3906e975d6db 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -1597,6 +1597,7 @@ static const struct of_device_id qcom_pcie_match[] = { { .compatible = "qcom,pcie-ipq4019", .data = &ops_2_4_0 }, { .compatible = "qcom,pcie-qcs404", .data = &ops_2_4_0 }, { .compatible = "qcom,pcie-sdm845", .data = &ops_2_7_0 }, + { .compatible = "qcom,pcie-sc8180x", .data = &ops_1_9_0 }, { .compatible = "qcom,pcie-sm8250", .data = &ops_1_9_0 }, { } };