Message ID | 20210710151034.32857-4-pgwipeout@gmail.com |
---|---|
State | Accepted |
Commit | 016c0e8a7a6e7820fb54d8ff8a4a2928a3016421 |
Headers | show |
Series | split rk3568 and rk3566 device trees | expand |
diff --git a/arch/arm64/boot/dts/rockchip/rk3566.dtsi b/arch/arm64/boot/dts/rockchip/rk3566.dtsi new file mode 100644 index 000000000000..3839eef5e4f7 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3566.dtsi @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include "rk356x.dtsi" + +/ { + compatible = "rockchip,rk3566"; +}; + +&power { + power-domain@RK3568_PD_PIPE { + reg = <RK3568_PD_PIPE>; + clocks = <&cru PCLK_PIPE>; + pm_qos = <&qos_pcie2x1>, + <&qos_sata1>, + <&qos_sata2>, + <&qos_usb3_0>, + <&qos_usb3_1>; + #power-domain-cells = <0>; + }; +};
Add the rk3566 dtsi which includes the soc specific changes for this chip. Signed-off-by: Peter Geis <pgwipeout@gmail.com> --- arch/arm64/boot/dts/rockchip/rk3566.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3566.dtsi