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[23.128.96.18]) by mx.google.com with ESMTP id dz14si9450283edb.241.2021.07.09.18.33.26; Fri, 09 Jul 2021 18:33:26 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=lrVwstQA; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231774AbhGJBfu (ORCPT + 7 others); Fri, 9 Jul 2021 21:35:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39346 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231718AbhGJBfq (ORCPT ); Fri, 9 Jul 2021 21:35:46 -0400 Received: from mail-lj1-x235.google.com (mail-lj1-x235.google.com [IPv6:2a00:1450:4864:20::235]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 838DEC0613DD for ; Fri, 9 Jul 2021 18:33:01 -0700 (PDT) Received: by mail-lj1-x235.google.com with SMTP id a6so10939409ljq.3 for ; Fri, 09 Jul 2021 18:33:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=s/A7UPTK4i/YxYWo+py1ZfWr+92yU5mUYYeUPHiFkEg=; b=lrVwstQAI1v5pb4k+3c+P83tiywljkXeskO28iiu/PzggOC3pkpID/AbcckRBATRY+ 4uhSyNM/2umDKActyEtPS5GXvrFOk0tfPOtky9y3L7opDou9xxts8f+rNDrQD5KHOdJU XjlFq99cDfEv5fmSfewu5NGVOlIrGIY9kZx93cMvMsB62ci051Fq5Hhd0EMNZ1m7Rmwx C3zanel+aChq5lzIBbjTxDoSxdkiGx1tbJOY6QLyfnqDth687uFIPUn8KoLcLfFQ89RH 12maxKtryyowubP1QWGY7kIrWOKGq6UReDPUXGmR3H4CKKePA4+cSZuwS5gUYF5eE6C9 t6RA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=s/A7UPTK4i/YxYWo+py1ZfWr+92yU5mUYYeUPHiFkEg=; b=nmYUC+ivqzkXUJ+MW+omnOj4gsJFeZWPZMPAcVxlSfNB6lJETkZqtqciRf4UclX0/1 0/7Zagxy8I7kY92p7v+NxxGkAzSTbmD6AoQMbKT6ubvcqs5htNOf8ygtg7ZxKeXXxvKW eRNRlhXfsAAg0jDemfEdEq/16o3gUsR38HSWF98zPHPOCjpByqaEj/WyxAMwTRo49zMs HKiASHJxUnPtoUQzAnui0fEzuuF6niKjy8oaX5JGY9xm23QBUqx45ZKWS6N1hFBxm0+P A41WGITiY90HCHbH5h2fBJp0iU0vEsrsql25tM1vSFGTJKv/r0LS+qvxNRWvGnFUJ1wo fTWQ== X-Gm-Message-State: AOAM530e++nBeYxaGaF91AWLArPMqD4wlRK9YY5dLwyq2Hnatzwuy0Nm cSX9+xJHGh5Nrw7Vhr0Y6lEOBA== X-Received: by 2002:a2e:a54a:: with SMTP id e10mr31836469ljn.120.1625880779935; Fri, 09 Jul 2021 18:32:59 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id p13sm588788lfh.206.2021.07.09.18.32.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Jul 2021 18:32:59 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Stephen Boyd , Taniya Das , Jonathan Marek , Michael Turquette Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Bryan O'Donoghue , Mark Brown , Ulf Hansson , linux-kernel@vger.kernel.org Subject: [PATCH v4 6/6] clk: qcom: videocc-sm8250: stop using mmcx regulator Date: Sat, 10 Jul 2021 04:32:53 +0300 Message-Id: <20210710013253.1134341-7-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210710013253.1134341-1-dmitry.baryshkov@linaro.org> References: <20210710013253.1134341-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Now as the common qcom clock controller code has been taught about power domains, stop mentioning mmcx supply as a way to power up the clock controller's gdscs. Signed-off-by: Dmitry Baryshkov Reviewed-by: Bjorn Andersson --- drivers/clk/qcom/videocc-sm8250.c | 4 ---- 1 file changed, 4 deletions(-) -- 2.30.2 diff --git a/drivers/clk/qcom/videocc-sm8250.c b/drivers/clk/qcom/videocc-sm8250.c index 7b435a1c2c4b..eedef85d90e5 100644 --- a/drivers/clk/qcom/videocc-sm8250.c +++ b/drivers/clk/qcom/videocc-sm8250.c @@ -276,7 +276,6 @@ static struct gdsc mvs0c_gdsc = { }, .flags = 0, .pwrsts = PWRSTS_OFF_ON, - .supply = "mmcx", }; static struct gdsc mvs1c_gdsc = { @@ -286,7 +285,6 @@ static struct gdsc mvs1c_gdsc = { }, .flags = 0, .pwrsts = PWRSTS_OFF_ON, - .supply = "mmcx", }; static struct gdsc mvs0_gdsc = { @@ -296,7 +294,6 @@ static struct gdsc mvs0_gdsc = { }, .flags = HW_CTRL, .pwrsts = PWRSTS_OFF_ON, - .supply = "mmcx", }; static struct gdsc mvs1_gdsc = { @@ -306,7 +303,6 @@ static struct gdsc mvs1_gdsc = { }, .flags = HW_CTRL, .pwrsts = PWRSTS_OFF_ON, - .supply = "mmcx", }; static struct clk_regmap *video_cc_sm8250_clocks[] = {