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[23.128.96.18]) by mx.google.com with ESMTP id dz14si9450283edb.241.2021.07.09.18.33.20; Fri, 09 Jul 2021 18:33:21 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fd6JtjJm; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231743AbhGJBfs (ORCPT + 7 others); Fri, 9 Jul 2021 21:35:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39352 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231701AbhGJBfp (ORCPT ); Fri, 9 Jul 2021 21:35:45 -0400 Received: from mail-lj1-x235.google.com (mail-lj1-x235.google.com [IPv6:2a00:1450:4864:20::235]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ED356C0613E5 for ; Fri, 9 Jul 2021 18:32:59 -0700 (PDT) Received: by mail-lj1-x235.google.com with SMTP id s18so10920508ljg.7 for ; Fri, 09 Jul 2021 18:32:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=C0H3/IhfxiYnQQh4KKn72LcaVRG7SSAFeeIagA4xcAo=; b=fd6JtjJmwsMIJAhK+Zn2EnRadcUGaMOz8HtfCU+5EqKqxVuOHKdzDXPeN+lUf2p6da NwI1W3jAX8fHwgj9tv5Yx4KfO07G8Mzv6ltCLDpt98nOQpBP3k6rCRF7cZX3MlMfsSt+ jMJ4KfJwNYwM0gxLWuIykybI09eW2JG2Fya+PUYuSQcBITF2dYa3/GWl1O4ABaAqbleA VzPp+NptJiqU410m/Y3u4bsfyArCnx6wnkisvfzqHgRYfoMTZdBW9cw6dJ1MCpQjr5bK WH4PbHWfi9Up80D6Ihq+WaQl68BT6owWbC/NxZcHMf/kwkme8CV3M1BBnOQc2mtrZ7RQ 8E6A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=C0H3/IhfxiYnQQh4KKn72LcaVRG7SSAFeeIagA4xcAo=; b=q5AdcOztuYHYfu2bPTAdD61AndWtzFMqUnVvqqxIXstbw81xVFjIxM3v9fiEpXFZsj Y8mOLXnieEhkE7blnIQAvX/3ta4xmy12AGp+AeJNv5XpF7j85kTGJEaIVevSOxtsYhZr pSKWtKO29pQYm2y+j+M7MBefI89RoKbGKHvh/IaZHTLIJuEV2c+bx/rnvMy4N1b5xZNd 6kuA9JUIsS4dcbaWq3FghM+RhQ+VLeaKKwFOY1QujS3fC8welJxVun+g0mTC7G4+Uxlb HsJDkKTvqKyTdsaU49DnofG0z9dTdgopkf/AkuzNopV26xf8h6FnCsqYKfp94/2mpjkH V7DA== X-Gm-Message-State: AOAM5332Vietrn+fZtkFxN57YwMTsF0dbjJxGW2ydjWKa8uqUtlB1O+m 1qkJcND9Iame9eSkL3Ev4papkQ== X-Received: by 2002:a2e:8709:: with SMTP id m9mr4223128lji.201.1625880778334; Fri, 09 Jul 2021 18:32:58 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id p13sm588788lfh.206.2021.07.09.18.32.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Jul 2021 18:32:58 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Stephen Boyd , Taniya Das , Jonathan Marek , Michael Turquette Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Bryan O'Donoghue , Mark Brown , Ulf Hansson , linux-kernel@vger.kernel.org Subject: [PATCH v4 4/6] arm64: dts: qcom: sm8250: remove mmcx regulator Date: Sat, 10 Jul 2021 04:32:51 +0300 Message-Id: <20210710013253.1134341-5-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210710013253.1134341-1-dmitry.baryshkov@linaro.org> References: <20210710013253.1134341-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Switch dispcc and videocc into using MMCX domain directly. Drop the now unused mmcx regulator. Signed-off-by: Dmitry Baryshkov Reviewed-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) -- 2.30.2 diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 4c0de12aaba6..2a468b85dc09 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -271,13 +271,6 @@ memory@80000000 { reg = <0x0 0x80000000 0x0 0x0>; }; - mmcx_reg: mmcx-reg { - compatible = "regulator-fixed-domain"; - power-domains = <&rpmhpd SM8250_MMCX>; - required-opps = <&rpmhpd_opp_low_svs>; - regulator-name = "MMCX"; - }; - pmu { compatible = "arm,armv8-pmuv3"; interrupts = ; @@ -2362,7 +2355,7 @@ videocc: clock-controller@abf0000 { clocks = <&gcc GCC_VIDEO_AHB_CLK>, <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>; - mmcx-supply = <&mmcx_reg>; + power-domains = <&rpmhpd SM8250_MMCX>; clock-names = "iface", "bi_tcxo", "bi_tcxo_ao"; #clock-cells = <1>; #reset-cells = <1>; @@ -2627,7 +2620,7 @@ opp-358000000 { dispcc: clock-controller@af00000 { compatible = "qcom,sm8250-dispcc"; reg = <0 0x0af00000 0 0x10000>; - mmcx-supply = <&mmcx_reg>; + power-domains = <&rpmhpd SM8250_MMCX>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&dsi0_phy 0>, <&dsi0_phy 1>,