From patchwork Tue Jun 15 15:51:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aswath Govindraju X-Patchwork-Id: 461630 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D891C48BE5 for ; Tue, 15 Jun 2021 15:54:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4826860FE9 for ; Tue, 15 Jun 2021 15:54:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231851AbhFOP4e (ORCPT ); Tue, 15 Jun 2021 11:56:34 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:35844 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231880AbhFOPyj (ORCPT ); Tue, 15 Jun 2021 11:54:39 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 15FFpwLU013487; Tue, 15 Jun 2021 10:51:58 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1623772318; bh=QlxTDuZB0l/SSCJl0lXVKZaOlvRUTOjDkRIQ1NqXNrE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=mq/CevMid3KDBVkT2s6eX/vNUJRajVq8qxf2+clzQ8EYE9P6K+EtN/Txs1C3Kpj93 ok9CTwXNFc3FIVBfmCuD7zyImjioJeT2aBju8nwF+tlHS7o5M0cxaUkoNozQ1R8VkA 6jHmiRyMURb8K+0FRCA0RhQjXtIxiaD+kIlqb1aM= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 15FFpw5x028876 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 15 Jun 2021 10:51:58 -0500 Received: from DLEE107.ent.ti.com (157.170.170.37) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Tue, 15 Jun 2021 10:51:57 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Tue, 15 Jun 2021 10:51:58 -0500 Received: from gsaswath-HP-ProBook-640-G5.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 15FFpIZE031828; Tue, 15 Jun 2021 10:51:50 -0500 From: Aswath Govindraju CC: Vignesh Raghavendra , Suman Anna , Lokesh Vutla , Kishon Vijay Abraham I , Aswath Govindraju , Nishanth Menon , Tero Kristo , Rob Herring , , , Subject: [PATCH v3 3/3] arm64: dts: ti: k3-am64-main: Update the location of TF-A Date: Tue, 15 Jun 2021 21:21:15 +0530 Message-ID: <20210615155115.28902-4-a-govindraju@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210615155115.28902-1-a-govindraju@ti.com> References: <20210615155115.28902-1-a-govindraju@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Due to a limitation for USB DFU boot mode, SPL load address has to be less than or equal to 0x70001000. So, load address of SPL and TF-A have been moved to 0x70000000 and 0x701c4000 respectively. Therefore, update TF-A's location in the device tree node. Signed-off-by: Aswath Govindraju --- arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi index 6a883f4349cb..7ab3652dfdfb 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -24,8 +24,8 @@ #size-cells = <1>; ranges = <0x0 0x00 0x70000000 0x200000>; - tfa-sram@0 { - reg = <0x0 0x1c000>; + tfa-sram@1c4000 { + reg = <0x1c4000 0x1c000>; }; dmsc-sram@1e0000 {