Message ID | 20210519143700.27392-6-bhupesh.sharma@linaro.org |
---|---|
State | New |
Headers | show |
Series | Enable Qualcomm Crypto Engine on sm8250 | expand |
diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml index a691cd08f372..f8d3ea8b0d08 100644 --- a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml +++ b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml @@ -34,6 +34,14 @@ properties: - const: bus - const: core + interconnects: + maxItems: 1 + description: | + Interconnect path between qce crypto and main memory. + + interconnect-names: + const: memory + dmas: items: - description: DMA specifiers for tx dma channel. @@ -47,8 +55,6 @@ properties: required: - compatible - reg - - clocks - - clock-names - dmas - dma-names
Add 'interconnects' and 'interconnect-names' to the device-tree binding documentation for qcom crypto IP. These properties describe the interconnect path between crypto and main memory and the interconnect type respectively. While at it also move 'clocks' to the optional properties sections, as crypto IPs on SoCs like sm8150, sm8250, sm8350 (and so on), don't require linux to setup the clocks (this is already done by the secure firmware running before linux). Cc: Thara Gopinath <thara.gopinath@linaro.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Andy Gross <agross@kernel.org> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: David S. Miller <davem@davemloft.net> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Vinod Koul <vkoul@kernel.org> Cc: dmaengine@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: bhupesh.linux@gmail.com Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> --- Documentation/devicetree/bindings/crypto/qcom-qce.yaml | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-)