From patchwork Sun May 16 23:05:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 439908 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp566351jac; Sun, 16 May 2021 16:06:33 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxLz8N7iCTJuDkG98hxIUnN0lIxvp1/zPXK59A+zQKhXTTEI4QvmNugU0L/3U/Sg+Lkw2sp X-Received: by 2002:a05:6638:388e:: with SMTP id b14mr17648602jav.73.1621206392979; Sun, 16 May 2021 16:06:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621206392; cv=none; d=google.com; s=arc-20160816; b=YoU9gPXpRbgZxmIDDO9v5fuOCprX89llEVnxx0lRuHQAKt3CfEBEI7JMi5DZLxNqTy 7Ei7v+gZJu3dVmZ3GbfwvQnfpCRABZsl+poQYXYB3PvENzbLh7ktmyYv524zZFVQpd8r 4cmxscalGqKU71rhGEaDTk/MdJOSpvfhlqZ57KEtlANXDH3bSw0bAlFm8iwZJhI5X4+7 5IeO1BhE25Gm5nP0h1AamNbqKHlraBBXiJ6QLd2KGhaiC8EV/bjakJ4b+nJ7VqK+cqy8 oJ4vVT4pNPxSBMCrsHZNS9ycCEfugliOz+84amA0ZvrSNsKYOFy1HahonhGPMWCPaHf/ dIXQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=WQx1Oa1O3JtHSEcF1yaSjpRPxL48ZQOEiymgFVcdGf8=; b=emCTfuEXPTc2FMUI6YsJPruxCC2tKm+gMRX2ZctAJxZKIadBFgC9XoJ1xBiz9qAiut bcB+ds87zfD4lvNDqph+whoVL0Wt8a4ag/pZbjP6nrJ8fMEoCR+uGRPCZQk2jEVtrJdX mG/EH4ZWtvVPleskDxHtAuIkPOEeYKVO4rP0EBAPZSLcnQ8zOU5Qb6ZgygfJnE6dT47W FFJE0qZ4lt92n0Khay67ty9pFgmXQMXkFxngrfWX77r/RJNtEj9//1WjJA4ThZNSydgC OUxVFd4hZCObKQ2EBzXwB+utxjNsU+mXnscaxHRK9Gk4YHCefRms21KDH9OLIJL1EA5R WjTg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id x20si15268428jao.3.2021.05.16.16.06.32; Sun, 16 May 2021 16:06:32 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232564AbhEPXHl (ORCPT + 7 others); Sun, 16 May 2021 19:07:41 -0400 Received: from mx2.suse.de ([195.135.220.15]:44100 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232067AbhEPXHi (ORCPT ); Sun, 16 May 2021 19:07:38 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id B014DB1F0; Sun, 16 May 2021 23:06:21 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-rockchip@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Heiko Stuebner , devicetree@vger.kernel.org Subject: [PATCH 8/9] arm64: dts: rockchip: rk1808k-toybrick-m0: Enable eMMC Date: Mon, 17 May 2021 01:05:50 +0200 Message-Id: <20210516230551.12469-9-afaerber@suse.de> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210516230551.12469-1-afaerber@suse.de> References: <20210516230551.12469-1-afaerber@suse.de> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add fake clocks (based on downstream kernel's debugfs clk_summary) and enable eMMC. Signed-off-by: Andreas Färber --- .../boot/dts/rockchip/rk1808k-toybrick-m0.dts | 38 +++++++++++++++++++ 1 file changed, 38 insertions(+) -- 2.31.1 diff --git a/arch/arm64/boot/dts/rockchip/rk1808k-toybrick-m0.dts b/arch/arm64/boot/dts/rockchip/rk1808k-toybrick-m0.dts index 15293a8576c6..aabe7a7034b2 100644 --- a/arch/arm64/boot/dts/rockchip/rk1808k-toybrick-m0.dts +++ b/arch/arm64/boot/dts/rockchip/rk1808k-toybrick-m0.dts @@ -38,6 +38,34 @@ vdd_cpu: vdd-cpu { regulator-max-microvolt = <850000>; vin-supply = <&vcc3v3_pcie>; }; + + hclk_emmc: hclk-emmc { + compatible = "fixed-clock"; + clock-frequency = <198000000>; + #clock-cells = <0>; + clock-output-names = "hclk_emmc"; + }; + + sclk_emmc: sclk-emmc { + compatible = "fixed-clock"; + clock-frequency = <297000000>; + #clock-cells = <0>; + clock-output-names = "sclk_emmc"; + }; + + sclk_emmc_drv: sclk-emmc-drv { + compatible = "fixed-clock"; + clock-frequency = <148500000>; + #clock-cells = <0>; + clock-output-names = "sclk_emmc_drv"; + }; + + sclk_emmc_sample: sclk-emmc-sample { + compatible = "fixed-clock"; + clock-frequency = <148500000>; + #clock-cells = <0>; + clock-output-names = "sclk_emmc_sample"; + }; }; &cpu0 { @@ -48,6 +76,16 @@ &cpu1 { cpu-supply = <&vdd_cpu>; }; +&emmc { + status = "okay"; + clocks = <&hclk_emmc>, <&sclk_emmc>, <&sclk_emmc_drv>, <&sclk_emmc_sample>; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; + cap-mmc-highspeed; + mmc-hs200-1_2v; + non-removable; + bus-width = <8>; +}; + &gic { /delete-property/ interrupts; };