From patchwork Sun May 16 23:05:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 439902 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp566321jac; Sun, 16 May 2021 16:06:30 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzfJ0J+DZ5j8eQ52SySxuHvKP5JihDbWrf0jsd2UIoFXeyT72pcGcvBcqoO8oezXjopXppE X-Received: by 2002:a6b:d918:: with SMTP id r24mr42511624ioc.25.1621206390537; Sun, 16 May 2021 16:06:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621206390; cv=none; d=google.com; s=arc-20160816; b=zHHDMMPC2n20gBYQpcPT+wUq543b/a4Q/R1TQRE9F8MMNZT3PCGHCgSM8K8HDZ6NAL fTpwsQEWaC72NldLI3IjpdLGsLEfrrxl1qLT2Ns1lsq2P9QXppPRZtuuGVuysk5fvOBR /gUJJBUYnUj8boi6c7qpEhBcQi9ujfMRs5z6si4F4mvOXqqBSdzRMrXQ2TwJYqdZcQeH q4NWWt+tDwM7YTa0sX/xd3yRadqpG3mehbAr/6+vG0tTfed3d4D58u/42IWFbYhFRqWi Ghk0I3VC1Z6DnkjHAtC0eLl4z/9wXyKBOt3CzIpbZkfkNo+8Ul7IaRG1oJvg+4zIXhf1 LwpA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=RdHT7KuHEx7yHRxCMbfc6rVbd1/ffAhJZYkSaJvpE28=; b=DFGkEHTlMyHWWbbgK3k9HqV9P/DZ7miUuaAmp05IWkv7hcit9wn1omXuy+IlHsxhX3 7u4uqeN8/0oYsV/MmDU4/tcHVDZ70LHmU4E29odP5z1yqtbE6xqBvyC+Qp/vT03nnvfv 7dn3CHqWg69OxGZGtTbapsgnVekWBOGz18QEcAQ1B/9K1LPooe3EIFhhiaoiqVVwdP3i 0YOZbON8F3Phw1ffrN8RR4DOAVpQPrDmL0tbi3Ll0pvDWP2dT7w90eHZBUsg9rD2InYI inS4ZNjyOoFlPaIMwC+Uy7HZl5LHkXPaoGhhFcv5EROoZvGskM/h+YU/H9VI0Ks+/vfx GdBQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id x20si15268428jao.3.2021.05.16.16.06.30; Sun, 16 May 2021 16:06:30 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232112AbhEPXHh (ORCPT + 7 others); Sun, 16 May 2021 19:07:37 -0400 Received: from mx2.suse.de ([195.135.220.15]:44012 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231936AbhEPXHg (ORCPT ); Sun, 16 May 2021 19:07:36 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 853EDB1DA; Sun, 16 May 2021 23:06:20 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-rockchip@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Heiko Stuebner , devicetree@vger.kernel.org Subject: [PATCH 4/9] arm64: dts: rockchip: Add Rockchip TB-RK1808M0 Date: Mon, 17 May 2021 01:05:46 +0200 Message-Id: <20210516230551.12469-5-afaerber@suse.de> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210516230551.12469-1-afaerber@suse.de> References: <20210516230551.12469-1-afaerber@suse.de> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add an initial Device Tree for Rockchip Toybrick TB-RK1808M0 mPCIe card. Based on shipping TB-RK1808M0 DTB. Signed-off-by: Andreas Färber --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk1808k-toybrick-m0.dts | 55 +++++++++++++++++++ 2 files changed, 56 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk1808k-toybrick-m0.dts -- 2.31.1 diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index c3e00c0e2db7..d5a3837ccb7c 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -3,6 +3,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-ctouch2.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-ctouch2-of10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-edimm2.2.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk1808k-toybrick-m0.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-evb.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-roc-cc.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3318-a95x-z2.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk1808k-toybrick-m0.dts b/arch/arm64/boot/dts/rockchip/rk1808k-toybrick-m0.dts new file mode 100644 index 000000000000..2f8075d2391c --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk1808k-toybrick-m0.dts @@ -0,0 +1,55 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Copyright (c) 2021 Andreas Färber + */ + +/dts-v1/; + +#include "rk1808.dtsi" + +/ { + compatible = "rockchip,tb-rk1808m0", "rockchip,rk1808"; + model = "Rockchip Toybrick TB-RK1808M0"; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x40000000>; + }; + + vcc3v3_pcie: vcc3v3-pcie { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_pcie"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + vdd_cpu: vdd-cpu { + compatible = "regulator-fixed"; + regulator-name = "vdd_cpu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + vin-supply = <&vcc3v3_pcie>; + }; +}; + +&cpu0 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply = <&vdd_cpu>; +}; + +&uart2 { + status = "okay"; + clocks = <&xin24m>; + clock-names = "baudclk"; +};