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[109.252.193.98]) by smtp.gmail.com with ESMTPSA id 10sm160061qkc.83.2021.03.30.16.05.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 Mar 2021 16:05:27 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Krzysztof Kozlowski , Rob Herring Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 6/6] memory: tegra: Print out info-level once per driver probe Date: Wed, 31 Mar 2021 02:04:45 +0300 Message-Id: <20210330230445.26619-7-digetx@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210330230445.26619-1-digetx@gmail.com> References: <20210330230445.26619-1-digetx@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Probing of EMC drivers may be deferred and in this case we get duplicated info messages during kernel boot. Use dev_info_once() helper to silence the duplicated messages. Signed-off-by: Dmitry Osipenko --- drivers/memory/tegra/tegra124-emc.c | 12 ++++++------ drivers/memory/tegra/tegra20-emc.c | 20 ++++++++++---------- drivers/memory/tegra/tegra30-emc.c | 18 +++++++++--------- 3 files changed, 25 insertions(+), 25 deletions(-) diff --git a/drivers/memory/tegra/tegra124-emc.c b/drivers/memory/tegra/tegra124-emc.c index 874e1a0f23cd..5699d909abc2 100644 --- a/drivers/memory/tegra/tegra124-emc.c +++ b/drivers/memory/tegra/tegra124-emc.c @@ -905,7 +905,7 @@ static int emc_init(struct tegra_emc *emc) else emc->dram_bus_width = 32; - dev_info(emc->dev, "%ubit DRAM bus\n", emc->dram_bus_width); + dev_info_once(emc->dev, "%ubit DRAM bus\n", emc->dram_bus_width); emc->dram_type &= EMC_FBIO_CFG5_DRAM_TYPE_MASK; emc->dram_type >>= EMC_FBIO_CFG5_DRAM_TYPE_SHIFT; @@ -1419,8 +1419,8 @@ static int tegra_emc_opp_table_init(struct tegra_emc *emc) goto put_hw_table; } - dev_info(emc->dev, "OPP HW ver. 0x%x, current clock rate %lu MHz\n", - hw_version, clk_get_rate(emc->clk) / 1000000); + dev_info_once(emc->dev, "OPP HW ver. 0x%x, current clock rate %lu MHz\n", + hw_version, clk_get_rate(emc->clk) / 1000000); /* first dummy rate-set initializes voltage state */ err = dev_pm_opp_set_rate(emc->dev, clk_get_rate(emc->clk)); @@ -1475,9 +1475,9 @@ static int tegra_emc_probe(struct platform_device *pdev) if (err) return err; } else { - dev_info(&pdev->dev, - "no memory timings for RAM code %u found in DT\n", - ram_code); + dev_info_once(&pdev->dev, + "no memory timings for RAM code %u found in DT\n", + ram_code); } err = emc_init(emc); diff --git a/drivers/memory/tegra/tegra20-emc.c b/drivers/memory/tegra/tegra20-emc.c index d653a6be8d7f..da8a0da8da79 100644 --- a/drivers/memory/tegra/tegra20-emc.c +++ b/drivers/memory/tegra/tegra20-emc.c @@ -411,12 +411,12 @@ static int tegra_emc_load_timings_from_dt(struct tegra_emc *emc, sort(emc->timings, emc->num_timings, sizeof(*timing), cmp_timings, NULL); - dev_info(emc->dev, - "got %u timings for RAM code %u (min %luMHz max %luMHz)\n", - emc->num_timings, - tegra_read_ram_code(), - emc->timings[0].rate / 1000000, - emc->timings[emc->num_timings - 1].rate / 1000000); + dev_info_once(emc->dev, + "got %u timings for RAM code %u (min %luMHz max %luMHz)\n", + emc->num_timings, + tegra_read_ram_code(), + emc->timings[0].rate / 1000000, + emc->timings[emc->num_timings - 1].rate / 1000000); return 0; } @@ -429,7 +429,7 @@ tegra_emc_find_node_by_ram_code(struct device *dev) int err; if (of_get_child_count(dev->of_node) == 0) { - dev_info(dev, "device-tree doesn't have memory timings\n"); + dev_info_once(dev, "device-tree doesn't have memory timings\n"); return NULL; } @@ -496,7 +496,7 @@ static int emc_setup_hw(struct tegra_emc *emc) else emc->dram_bus_width = 32; - dev_info(emc->dev, "%ubit DRAM bus\n", emc->dram_bus_width); + dev_info_once(emc->dev, "%ubit DRAM bus\n", emc->dram_bus_width); return 0; } @@ -931,8 +931,8 @@ static int tegra_emc_opp_table_init(struct tegra_emc *emc) goto put_hw_table; } - dev_info(emc->dev, "OPP HW ver. 0x%x, current clock rate %lu MHz\n", - hw_version, clk_get_rate(emc->clk) / 1000000); + dev_info_once(emc->dev, "OPP HW ver. 0x%x, current clock rate %lu MHz\n", + hw_version, clk_get_rate(emc->clk) / 1000000); /* first dummy rate-set initializes voltage state */ err = dev_pm_opp_set_rate(emc->dev, clk_get_rate(emc->clk)); diff --git a/drivers/memory/tegra/tegra30-emc.c b/drivers/memory/tegra/tegra30-emc.c index 6985da0ffb35..829f6d673c96 100644 --- a/drivers/memory/tegra/tegra30-emc.c +++ b/drivers/memory/tegra/tegra30-emc.c @@ -998,12 +998,12 @@ static int emc_load_timings_from_dt(struct tegra_emc *emc, if (err) return err; - dev_info(emc->dev, - "got %u timings for RAM code %u (min %luMHz max %luMHz)\n", - emc->num_timings, - tegra_read_ram_code(), - emc->timings[0].rate / 1000000, - emc->timings[emc->num_timings - 1].rate / 1000000); + dev_info_once(emc->dev, + "got %u timings for RAM code %u (min %luMHz max %luMHz)\n", + emc->num_timings, + tegra_read_ram_code(), + emc->timings[0].rate / 1000000, + emc->timings[emc->num_timings - 1].rate / 1000000); return 0; } @@ -1015,7 +1015,7 @@ static struct device_node *emc_find_node_by_ram_code(struct device *dev) int err; if (of_get_child_count(dev->of_node) == 0) { - dev_info(dev, "device-tree doesn't have memory timings\n"); + dev_info_once(dev, "device-tree doesn't have memory timings\n"); return NULL; } @@ -1503,8 +1503,8 @@ static int tegra_emc_opp_table_init(struct tegra_emc *emc) goto put_hw_table; } - dev_info(emc->dev, "OPP HW ver. 0x%x, current clock rate %lu MHz\n", - hw_version, clk_get_rate(emc->clk) / 1000000); + dev_info_once(emc->dev, "OPP HW ver. 0x%x, current clock rate %lu MHz\n", + hw_version, clk_get_rate(emc->clk) / 1000000); /* first dummy rate-set initializes voltage state */ err = dev_pm_opp_set_rate(emc->dev, clk_get_rate(emc->clk));