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[92.233.226.227]) by smtp.gmail.com with ESMTPSA id n16sm11520383edr.42.2021.03.30.07.47.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 Mar 2021 07:47:31 -0700 (PDT) From: Srinivas Kandagatla To: vkoul@kernel.org Cc: yung-chuan.liao@linux.intel.com, pierre-louis.bossart@linux.intel.com, sanyog.r.kale@intel.com, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, robh@kernel.org, devicetree@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH v6 3/9] soundwire: qcom: set continue execution flag for ignored commands Date: Tue, 30 Mar 2021 15:47:13 +0100 Message-Id: <20210330144719.13284-4-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20210330144719.13284-1-srinivas.kandagatla@linaro.org> References: <20210330144719.13284-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org version 1.5.1 and higher IPs of this controller required to set continue execution on ignored command flag. This patch sets this flag. Signed-off-by: Srinivas Kandagatla Reviewed-by: Pierre-Louis Bossart --- drivers/soundwire/qcom.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) -- 2.21.0 diff --git a/drivers/soundwire/qcom.c b/drivers/soundwire/qcom.c index fdcb8ffb4284..edc77d18c245 100644 --- a/drivers/soundwire/qcom.c +++ b/drivers/soundwire/qcom.c @@ -40,6 +40,7 @@ #define SWRM_CMD_FIFO_CMD 0x308 #define SWRM_CMD_FIFO_STATUS 0x30C #define SWRM_CMD_FIFO_CFG_ADDR 0x314 +#define SWRM_CONTINUE_EXEC_ON_CMD_IGNORE BIT(31) #define SWRM_RD_WR_CMD_RETRIES 0x7 #define SWRM_CMD_FIFO_RD_FIFO_ADDR 0x318 #define SWRM_ENUMERATOR_CFG_ADDR 0x500 @@ -343,7 +344,15 @@ static int qcom_swrm_init(struct qcom_swrm_ctrl *ctrl) ctrl->reg_write(ctrl, SWRM_MCP_CFG_ADDR, val); /* Configure number of retries of a read/write cmd */ - ctrl->reg_write(ctrl, SWRM_CMD_FIFO_CFG_ADDR, SWRM_RD_WR_CMD_RETRIES); + if (ctrl->version > 0x01050001) { + /* Only for versions >= 1.5.1 */ + ctrl->reg_write(ctrl, SWRM_CMD_FIFO_CFG_ADDR, + SWRM_RD_WR_CMD_RETRIES | + SWRM_CONTINUE_EXEC_ON_CMD_IGNORE); + } else { + ctrl->reg_write(ctrl, SWRM_CMD_FIFO_CFG_ADDR, + SWRM_RD_WR_CMD_RETRIES); + } /* Set IRQ to PULSE */ ctrl->reg_write(ctrl, SWRM_COMP_CFG_ADDR,