From patchwork Thu Mar 11 23:12:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 398988 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B76B4C4332B for ; Thu, 11 Mar 2021 23:16:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9FE4D64FB8 for ; Thu, 11 Mar 2021 23:16:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231270AbhCKXPe (ORCPT ); Thu, 11 Mar 2021 18:15:34 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59990 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229679AbhCKXP1 (ORCPT ); Thu, 11 Mar 2021 18:15:27 -0500 Received: from mail-wr1-x42f.google.com (mail-wr1-x42f.google.com [IPv6:2a00:1450:4864:20::42f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 048ADC061574; Thu, 11 Mar 2021 15:15:27 -0800 (PST) Received: by mail-wr1-x42f.google.com with SMTP id z2so731383wrl.5; Thu, 11 Mar 2021 15:15:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=r5sIG1GOqNqNmHOUHj/gmDab5IiEjdBCRn9n8L7QWwc=; b=EhqeCUyMsUeuVqTWaDkewCpx+JBizn1zMajJNSOzidRDHKvawUQtiwUXF4EGj+Qd9s 9TIw8DZNhGo0MQB+PexoNZwuiOU/12ePKPOVBhFaIzzfSQxcGojIMtYLAQ6WpmHA6ku+ 3c6ykL95Aa041X6AXtKjQ3Z1VD/7pmRZcfooSNeMdAugTrvXYwZWSpymalodMpyikv1I VUmSeOl1UsxdBv3f+MjGOv+mqsMRuzkPNjvPdU65rmA13oPjRL8zClobUPCfByl3Q+TR EUatv+TDAqF+KllmUYArFengk19+i5sFc+1ufnidYSB5x8OayQgzVkOa92Kc+nf8/aQ4 Ci1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=r5sIG1GOqNqNmHOUHj/gmDab5IiEjdBCRn9n8L7QWwc=; b=UXjBkZOctnGiix1jFh7TJUgZcQbXaWThJPM1sI2QuoEog3DtA/6tX/kVzVOs1SbwxI 9PD7mn+zdVoIYwk26hwMbl1o4wC/njTQjBp0EXsjrRpgr2wRBrzFrh1AkbFxz+nn2f8k JBevOh1w+5tPfXlf94ARB6b1/VO/twlRpDVNFSwwVKf3PjcELeYuOBI5LpxlltuO0X4M uRttt7G+zldlnEfhUAly1Sohba5PAy+2KFnHApX4UrJvNVBftlge8aJEXo69L5Pm6KsY WTsUWCBYcVRhM7fsqZ1pM8yehhFRX4FVIo/eYIPRemsFXKkMoToYpB+Dw9Trw0W5lPYl 3fpw== X-Gm-Message-State: AOAM533ziyy9NC5lFrilhYi2+MQOqN6+/2UL1jbR/z6QjClnTlLXPZPo YMqbsyTqDu1bUWBnmjdpCGVdejFUbDY= X-Google-Smtp-Source: ABdhPJxNpvvlUnvWEnoKhw84T0BZYKWL0CVxoWWYPgSYBh7MokiYzmRJnKPS37Ge7UUVb4TtVFzXIg== X-Received: by 2002:a5d:698e:: with SMTP id g14mr10864412wru.127.1615504525745; Thu, 11 Mar 2021 15:15:25 -0800 (PST) Received: from localhost.localdomain (109-252-193-52.dynamic.spd-mgts.ru. [109.252.193.52]) by smtp.gmail.com with ESMTPSA id j203sm263918wmj.40.2021.03.11.15.15.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 15:15:25 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Mark Brown , Paul Fertser , Rob Herring , Matt Merhar , Peter Geis , Nicolas Chauvet , Viresh Kumar , Stephen Boyd , =?utf-8?b?TWljaGHFgiBNaXJvc8WCYXc=?= , Krzysztof Kozlowski Cc: devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 2/6] soc/tegra: Add CONFIG_SOC_TEGRA_COMMON and select PM_OPP by default Date: Fri, 12 Mar 2021 02:12:04 +0300 Message-Id: <20210311231208.18180-3-digetx@gmail.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210311231208.18180-1-digetx@gmail.com> References: <20210311231208.18180-1-digetx@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add new Kconfig SOC_TEGRA_COMMON option which selects configuration options that are common for all Tegra SoCs. Select PM_OPP by default since from now on OPPs will be used by Tegra drivers which present on all SoC generations, like display controller driver for example. Tested-by: Peter Geis # Ouya T30 Tested-by: Paul Fertser # PAZ00 T20 Tested-by: Nicolas Chauvet # PAZ00 T20 and TK1 T124 Tested-by: Matt Merhar # Ouya T30 Signed-off-by: Dmitry Osipenko --- drivers/soc/tegra/Kconfig | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/soc/tegra/Kconfig b/drivers/soc/tegra/Kconfig index 976dee036470..bcd61ae59ba3 100644 --- a/drivers/soc/tegra/Kconfig +++ b/drivers/soc/tegra/Kconfig @@ -13,6 +13,7 @@ config ARCH_TEGRA_2x_SOC select PINCTRL_TEGRA20 select PL310_ERRATA_727915 if CACHE_L2X0 select PL310_ERRATA_769419 if CACHE_L2X0 + select SOC_TEGRA_COMMON select SOC_TEGRA_FLOWCTRL select SOC_TEGRA_PMC select SOC_TEGRA20_VOLTAGE_COUPLER @@ -27,6 +28,7 @@ config ARCH_TEGRA_3x_SOC select ARM_ERRATA_764369 if SMP select PINCTRL_TEGRA30 select PL310_ERRATA_769419 if CACHE_L2X0 + select SOC_TEGRA_COMMON select SOC_TEGRA_FLOWCTRL select SOC_TEGRA_PMC select SOC_TEGRA30_VOLTAGE_COUPLER @@ -40,6 +42,7 @@ config ARCH_TEGRA_114_SOC select ARM_ERRATA_798181 if SMP select HAVE_ARM_ARCH_TIMER select PINCTRL_TEGRA114 + select SOC_TEGRA_COMMON select SOC_TEGRA_FLOWCTRL select SOC_TEGRA_PMC select TEGRA_TIMER @@ -51,6 +54,7 @@ config ARCH_TEGRA_124_SOC bool "Enable support for Tegra124 family" select HAVE_ARM_ARCH_TIMER select PINCTRL_TEGRA124 + select SOC_TEGRA_COMMON select SOC_TEGRA_FLOWCTRL select SOC_TEGRA_PMC select TEGRA_TIMER @@ -66,6 +70,7 @@ if ARM64 config ARCH_TEGRA_132_SOC bool "NVIDIA Tegra132 SoC" select PINCTRL_TEGRA124 + select SOC_TEGRA_COMMON select SOC_TEGRA_FLOWCTRL select SOC_TEGRA_PMC help @@ -77,6 +82,7 @@ config ARCH_TEGRA_132_SOC config ARCH_TEGRA_210_SOC bool "NVIDIA Tegra210 SoC" select PINCTRL_TEGRA210 + select SOC_TEGRA_COMMON select SOC_TEGRA_FLOWCTRL select SOC_TEGRA_PMC select TEGRA_TIMER @@ -99,6 +105,7 @@ config ARCH_TEGRA_186_SOC select TEGRA_BPMP select TEGRA_HSP_MBOX select TEGRA_IVC + select SOC_TEGRA_COMMON select SOC_TEGRA_PMC help Enable support for the NVIDIA Tegar186 SoC. The Tegra186 features a @@ -115,6 +122,7 @@ config ARCH_TEGRA_194_SOC select TEGRA_BPMP select TEGRA_HSP_MBOX select TEGRA_IVC + select SOC_TEGRA_COMMON select SOC_TEGRA_PMC help Enable support for the NVIDIA Tegra194 SoC. @@ -125,6 +133,7 @@ config ARCH_TEGRA_234_SOC select TEGRA_BPMP select TEGRA_HSP_MBOX select TEGRA_IVC + select SOC_TEGRA_COMMON select SOC_TEGRA_PMC help Enable support for the NVIDIA Tegra234 SoC. @@ -132,6 +141,10 @@ config ARCH_TEGRA_234_SOC endif endif +config SOC_TEGRA_COMMON + bool + select PM_OPP + config SOC_TEGRA_FUSE def_bool y depends on ARCH_TEGRA