[v11,6/6] MAINTAINERS: add MT7621 CLOCK maintainer

Message ID	20210309052226.29531-7-sergio.paracuellos@gmail.com
State	Superseded
Headers	show Return-Path: <devicetree-owner@kernel.org> From: Sergio Paracuellos <sergio.paracuellos@gmail.com> To: sboyd@kernel.org Cc: robh+dt@kernel.org, john@phrozen.org, tsbogend@alpha.franken.de, gregkh@linuxfoundation.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-mips@vger.kernel.org, devel@driverdev.osuosl.org, neil@brown.name, linux-kernel@vger.kernel.org Subject: [PATCH v11 6/6] MAINTAINERS: add MT7621 CLOCK maintainer Date: Tue, 9 Mar 2021 06:22:26 +0100 Message-Id: <20210309052226.29531-7-sergio.paracuellos@gmail.com> In-Reply-To: <20210309052226.29531-1-sergio.paracuellos@gmail.com> References: <20210309052226.29531-1-sergio.paracuellos@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk
Series	MIPS: ralink: add CPU clock detection and clock driver for MT7621 \| expand [v11,0/6] MIPS: ralink: add CPU clock detection and clock driver for MT7621 [v11,1/6] dt-bindings: clock: add dt binding header for mt7621 clocks [v11,2/6] dt: bindings: add mt7621-sysc device tree binding documentation [v11,3/6] clk: ralink: add clock driver for mt7621 SoC [v11,4/6] staging: mt7621-dts: make use of new 'mt7621-clk' [v11,5/6] staging: mt7621-dts: use valid vendor 'mediatek' instead of invalid 'mtk' [v11,6/6] MAINTAINERS: add MT7621 CLOCK maintainer

Message ID

20210309052226.29531-7-sergio.paracuellos@gmail.com

State

Superseded

Headers

From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
To: sboyd@kernel.org
Cc: robh+dt@kernel.org, john@phrozen.org, tsbogend@alpha.franken.de,
	gregkh@linuxfoundation.org, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org, linux-mips@vger.kernel.org,
	devel@driverdev.osuosl.org, neil@brown.name, linux-kernel@vger.kernel.org
Subject: [PATCH v11 6/6] MAINTAINERS: add MT7621 CLOCK maintainer
Date: Tue,  9 Mar 2021 06:22:26 +0100
Message-Id: <20210309052226.29531-7-sergio.paracuellos@gmail.com>
In-Reply-To: <20210309052226.29531-1-sergio.paracuellos@gmail.com>
References: <20210309052226.29531-1-sergio.paracuellos@gmail.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Precedence: bulk

Series

MIPS: ralink: add CPU clock detection and clock driver for MT7621 | expand

Commit Message

Sergio Paracuellos March 9, 2021, 5:22 a.m. UTC

Adding myself as maintainer for mt7621 clock driver.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
---
 MAINTAINERS | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 809a68af5efd..ecad5d972122 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -11288,6 +11288,12 @@  L:	linux-wireless@vger.kernel.org
 S:	Maintained
 F:	drivers/net/wireless/mediatek/mt7601u/
 
+MEDIATEK MT7621 CLOCK DRIVER
+M:	Sergio Paracuellos <sergio.paracuellos@gmail.com>
+S:	Maintained
+F:	Documentation/devicetree/bindings/clock/mediatek,mt7621-sysc.yaml
+F:	drivers/clk/ralink/clk-mt7621.c
+
 MEDIATEK MT7621/28/88 I2C DRIVER
 M:	Stefan Roese <sr@denx.de>
 L:	linux-i2c@vger.kernel.org

[v11,6/6] MAINTAINERS: add MT7621 CLOCK maintainer

Commit Message

Patch