[v5,01/13] phy: cadence: Sierra: Fix PHY power_on sequence

Message ID	20210308050732.7140-2-kishon@ti.com
State	Superseded
Headers	show Return-Path: <SRS0=AbCP=IG=vger.kernel.org=devicetree-owner@kernel.org> From: Kishon Vijay Abraham I <kishon@ti.com> To: Kishon Vijay Abraham I <kishon@ti.com>, Vinod Koul <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>, Philipp Zabel <p.zabel@pengutronix.de>, Swapnil Jakhade <sjakhade@cadence.com> CC: <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>, Lokesh Vutla <lokeshvutla@ti.com>, <stable@vger.kernel.org> Subject: [PATCH v5 01/13] phy: cadence: Sierra: Fix PHY power_on sequence Date: Mon, 8 Mar 2021 10:37:20 +0530 Message-ID: <20210308050732.7140-2-kishon@ti.com> In-Reply-To: <20210308050732.7140-1-kishon@ti.com> References: <20210308050732.7140-1-kishon@ti.com> MIME-Version: 1.0 Content-Type: text/plain Precedence: bulk
Series	PHY: Add support in Sierra to use external clock \| expand [v5,00/13] PHY: Add support in Sierra to use external clock [v5,01/13] phy: cadence: Sierra: Fix PHY power_on sequence [v5,03/13] phy: cadence: cadence-sierra: Create PHY only for "phy" or "link" sub-nodes [v5,04/13] phy: ti: j721e-wiz: Get PHY properties only for "phy" or "link" subnode [v5,05/13] phy: cadence: cadence-sierra: Move all clk_get_() to a separate function [v5,06/13] phy: cadence: cadence-sierra: Move all reset_control_get() to a separate function [v5,07/13] phy: cadence: cadence-sierra: Explicitly request exclusive reset control [v5,08/13] phy: cadence-torrent: Use a common header file for Cadence SERDES [v5,09/13] phy: cadence: cadence-sierra: Add array of input clocks in "struct cdns_sierra_phy" [v5,10/13] phy: cadence: cadence-sierra: Add missing clk_disable_unprepare() in .remove callback [v5,11/13] dt-bindings: phy: phy-cadence-sierra: Add binding to model Sierra as clock provider [v5,12/13] phy: cadence: phy-cadence-sierra: Model PLL_CMNLC and PLL_CMNLC1 as clocks (mux clocks) [v5,13/13] phy: cadence: sierra: Enable pll_cmnlc and pll_cmnlc1 clocks

Message ID

20210308050732.7140-2-kishon@ti.com

State

Superseded

Headers

From: Kishon Vijay Abraham I <kishon@ti.com>
To: Kishon Vijay Abraham I <kishon@ti.com>, Vinod Koul <vkoul@kernel.org>,
	Rob Herring <robh+dt@kernel.org>, Philipp Zabel <p.zabel@pengutronix.de>,
	Swapnil Jakhade <sjakhade@cadence.com>
CC: <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
	Lokesh Vutla <lokeshvutla@ti.com>, <stable@vger.kernel.org>
Subject: [PATCH v5 01/13] phy: cadence: Sierra: Fix PHY power_on sequence
Date: Mon, 8 Mar 2021 10:37:20 +0530
Message-ID: <20210308050732.7140-2-kishon@ti.com>
In-Reply-To: <20210308050732.7140-1-kishon@ti.com>
References: <20210308050732.7140-1-kishon@ti.com>
MIME-Version: 1.0
Content-Type: text/plain
Precedence: bulk

Series

PHY: Add support in Sierra to use external clock | expand

Commit Message

Kishon Vijay Abraham I March 8, 2021, 5:07 a.m. UTC

Commit 44d30d622821d ("phy: cadence: Add driver for Sierra PHY")
de-asserts PHY_RESET even before the configurations are loaded in
phy_init(). However PHY_RESET should be de-asserted only after
all the configurations has been initialized, instead of de-asserting
in probe. Fix it here.

Fixes: 44d30d622821d ("phy: cadence: Add driver for Sierra PHY")
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Cc: <stable@vger.kernel.org> # v5.4+
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
---
 drivers/phy/cadence/phy-cadence-sierra.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c
index 26a0badabe38..19f32ae877b9 100644
--- a/drivers/phy/cadence/phy-cadence-sierra.c
+++ b/drivers/phy/cadence/phy-cadence-sierra.c
@@ -319,6 +319,12 @@  static int cdns_sierra_phy_on(struct phy *gphy)
 	u32 val;
 	int ret;
 
+	ret = reset_control_deassert(sp->phy_rst);
+	if (ret) {
+		dev_err(dev, "Failed to take the PHY out of reset\n");
+		return ret;
+	}
+
 	/* Take the PHY lane group out of reset */
 	ret = reset_control_deassert(ins->lnk_rst);
 	if (ret) {
@@ -616,7 +622,6 @@  static int cdns_sierra_phy_probe(struct platform_device *pdev)
 
 	pm_runtime_enable(dev);
 	phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
-	reset_control_deassert(sp->phy_rst);
 	return PTR_ERR_OR_ZERO(phy_provider);
 
 put_child:

[v5,01/13] phy: cadence: Sierra: Fix PHY power_on sequence

Commit Message

Patch