| Message ID | 20210304213902.83903-14-marcan@marcan.st |
|---|---|
| State | New |
| Headers | show |
| Series | Apple M1 SoC platform bring-up | expand |
On Fri, Mar 05, 2021 at 06:38:48AM +0900, Hector Martin wrote: > Apple ARM64 SoCs have a ton of vendor-specific registers we're going to > have to deal with, and those don't really belong in sysreg.h with all > the architectural registers. Make a new home for them, and add some > registers which are useful for early bring-up. > > Signed-off-by: Hector Martin <marcan@marcan.st> > --- > MAINTAINERS | 1 + > arch/arm64/include/asm/sysreg_apple.h | 69 +++++++++++++++++++++++++++ > 2 files changed, 70 insertions(+) > create mode 100644 arch/arm64/include/asm/sysreg_apple.h > > diff --git a/MAINTAINERS b/MAINTAINERS > index aec14fbd61b8..3a352c687d4b 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -1646,6 +1646,7 @@ B: https://github.com/AsahiLinux/linux/issues > C: irc://chat.freenode.net/asahi-dev > T: git https://github.com/AsahiLinux/linux.git > F: Documentation/devicetree/bindings/arm/apple.yaml > +F: arch/arm64/include/asm/sysreg_apple.h (this isn't needed with my suggestion below). > ARM/ARTPEC MACHINE SUPPORT > M: Jesper Nilsson <jesper.nilsson@axis.com> > diff --git a/arch/arm64/include/asm/sysreg_apple.h b/arch/arm64/include/asm/sysreg_apple.h > new file mode 100644 > index 000000000000..48347a51d564 > --- /dev/null > +++ b/arch/arm64/include/asm/sysreg_apple.h I doubt apple are the only folks doing this, so can we instead have sysreg-impdef.h please, and then have an Apple section in there for these registers? That way, we could also have an imp_sys_reg() macro to limit CRn to 11 or 15, which is the reserved encoding space for these registers. We'll cc you for any patches touching the Apple parts, as we don't have the first clue about what's hiding in there. > @@ -0,0 +1,69 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * Apple SoC vendor-defined system register definitions > + * > + * Copyright The Asahi Linux Contributors > + > + * This file contains only well-understood registers that are useful to > + * Linux. If you are looking for things to add here, you should visit: > + * > + * https://github.com/AsahiLinux/docs/wiki/HW:ARM-System-Registers > + */ > + > +#ifndef __ASM_SYSREG_APPLE_H > +#define __ASM_SYSREG_APPLE_H > + > +#include <asm/sysreg.h> > +#include <linux/bits.h> > +#include <linux/bitfield.h> > + > +/* > + * Keep these registers in encoding order, except for register arrays; > + * those should be listed in array order starting from the position of > + * the encoding of the first register. > + */ > + > +#define SYS_APL_PMCR0_EL1 sys_reg(3, 1, 15, 0, 0) > +#define PMCR0_IMODE GENMASK(10, 8) > +#define PMCR0_IMODE_OFF 0 > +#define PMCR0_IMODE_PMI 1 > +#define PMCR0_IMODE_AIC 2 > +#define PMCR0_IMODE_HALT 3 > +#define PMCR0_IMODE_FIQ 4 > +#define PMCR0_IACT BIT(11) The Arm ARM says this about imp-def sysregs: | The Arm architecture guarantees not to define any register name | prefixed with IMP_ as part of the standard Arm architecture. | | Note | Arm strongly recommends that any register names created in the | IMPLEMENTATION DEFINED register spaces be prefixed with IMP_ and | postfixed with _ELx, where appropriate. and it seems like we could follow that here without much effort, if you don't mind. Will
On Wed, Mar 24, 2021 at 06:38:18PM +0000, Will Deacon wrote: > On Fri, Mar 05, 2021 at 06:38:48AM +0900, Hector Martin wrote: > > Apple ARM64 SoCs have a ton of vendor-specific registers we're going to > > have to deal with, and those don't really belong in sysreg.h with all > > the architectural registers. Make a new home for them, and add some > > registers which are useful for early bring-up. > > > > Signed-off-by: Hector Martin <marcan@marcan.st> > > --- > > MAINTAINERS | 1 + > > arch/arm64/include/asm/sysreg_apple.h | 69 +++++++++++++++++++++++++++ > > 2 files changed, 70 insertions(+) > > create mode 100644 arch/arm64/include/asm/sysreg_apple.h > > > > diff --git a/MAINTAINERS b/MAINTAINERS > > index aec14fbd61b8..3a352c687d4b 100644 > > --- a/MAINTAINERS > > +++ b/MAINTAINERS > > @@ -1646,6 +1646,7 @@ B: https://github.com/AsahiLinux/linux/issues > > C: irc://chat.freenode.net/asahi-dev > > T: git https://github.com/AsahiLinux/linux.git > > F: Documentation/devicetree/bindings/arm/apple.yaml > > +F: arch/arm64/include/asm/sysreg_apple.h > > (this isn't needed with my suggestion below). > > > ARM/ARTPEC MACHINE SUPPORT > > M: Jesper Nilsson <jesper.nilsson@axis.com> > > diff --git a/arch/arm64/include/asm/sysreg_apple.h b/arch/arm64/include/asm/sysreg_apple.h > > new file mode 100644 > > index 000000000000..48347a51d564 > > --- /dev/null > > +++ b/arch/arm64/include/asm/sysreg_apple.h > > I doubt apple are the only folks doing this, so can we instead have > sysreg-impdef.h please, and then have an Apple section in there for these > registers? That way, we could also have an imp_sys_reg() macro to limit > CRn to 11 or 15, which is the reserved encoding space for these registers. > > We'll cc you for any patches touching the Apple parts, as we don't have > the first clue about what's hiding in there. For existing IMP-DEF sysregs (e.g. the Kryo L2 control registers), we've put the definitions in the drivers, rather than collating non-architectural bits under arch/arm64/. So far we've kept arch/arm64/ largely devoid of IMP-DEF bits, and it seems a shame to add something with the sole purpose of collating that, especially given arch code shouldn't need to touch these if FW and bootloader have done their jobs right. Can we put the definitions in the relevant drivers? That would sidestep any pain with MAINTAINERS, too. Thanks, Mark.
On Wed, Mar 24, 2021 at 06:59:21PM +0000, Mark Rutland wrote: > On Wed, Mar 24, 2021 at 06:38:18PM +0000, Will Deacon wrote: > > On Fri, Mar 05, 2021 at 06:38:48AM +0900, Hector Martin wrote: > > > Apple ARM64 SoCs have a ton of vendor-specific registers we're going to > > > have to deal with, and those don't really belong in sysreg.h with all > > > the architectural registers. Make a new home for them, and add some > > > registers which are useful for early bring-up. > > > > > > Signed-off-by: Hector Martin <marcan@marcan.st> > > > --- > > > MAINTAINERS | 1 + > > > arch/arm64/include/asm/sysreg_apple.h | 69 +++++++++++++++++++++++++++ > > > 2 files changed, 70 insertions(+) > > > create mode 100644 arch/arm64/include/asm/sysreg_apple.h > > > > > > diff --git a/MAINTAINERS b/MAINTAINERS > > > index aec14fbd61b8..3a352c687d4b 100644 > > > --- a/MAINTAINERS > > > +++ b/MAINTAINERS > > > @@ -1646,6 +1646,7 @@ B: https://github.com/AsahiLinux/linux/issues > > > C: irc://chat.freenode.net/asahi-dev > > > T: git https://github.com/AsahiLinux/linux.git > > > F: Documentation/devicetree/bindings/arm/apple.yaml > > > +F: arch/arm64/include/asm/sysreg_apple.h > > > > (this isn't needed with my suggestion below). > > > > > ARM/ARTPEC MACHINE SUPPORT > > > M: Jesper Nilsson <jesper.nilsson@axis.com> > > > diff --git a/arch/arm64/include/asm/sysreg_apple.h b/arch/arm64/include/asm/sysreg_apple.h > > > new file mode 100644 > > > index 000000000000..48347a51d564 > > > --- /dev/null > > > +++ b/arch/arm64/include/asm/sysreg_apple.h > > > > I doubt apple are the only folks doing this, so can we instead have > > sysreg-impdef.h please, and then have an Apple section in there for these > > registers? That way, we could also have an imp_sys_reg() macro to limit > > CRn to 11 or 15, which is the reserved encoding space for these registers. > > > > We'll cc you for any patches touching the Apple parts, as we don't have > > the first clue about what's hiding in there. > > For existing IMP-DEF sysregs (e.g. the Kryo L2 control registers), we've > put the definitions in the drivers, rather than collating > non-architectural bits under arch/arm64/. Yeah, but we could include those here as well. > So far we've kept arch/arm64/ largely devoid of IMP-DEF bits, and it > seems a shame to add something with the sole purpose of collating that, > especially given arch code shouldn't need to touch these if FW and > bootloader have done their jobs right. > > Can we put the definitions in the relevant drivers? That would sidestep > any pain with MAINTAINERS, too. If we can genuinely ignore these in arch code, then sure. I just don't know how long that is going to be the case, and ending up in a situation where these are scattered randomly throughout the tree sounds horrible to me. Will
diff --git a/MAINTAINERS b/MAINTAINERS index aec14fbd61b8..3a352c687d4b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1646,6 +1646,7 @@ B: https://github.com/AsahiLinux/linux/issues C: irc://chat.freenode.net/asahi-dev T: git https://github.com/AsahiLinux/linux.git F: Documentation/devicetree/bindings/arm/apple.yaml +F: arch/arm64/include/asm/sysreg_apple.h ARM/ARTPEC MACHINE SUPPORT M: Jesper Nilsson <jesper.nilsson@axis.com> diff --git a/arch/arm64/include/asm/sysreg_apple.h b/arch/arm64/include/asm/sysreg_apple.h new file mode 100644 index 000000000000..48347a51d564 --- /dev/null +++ b/arch/arm64/include/asm/sysreg_apple.h @@ -0,0 +1,69 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Apple SoC vendor-defined system register definitions + * + * Copyright The Asahi Linux Contributors + + * This file contains only well-understood registers that are useful to + * Linux. If you are looking for things to add here, you should visit: + * + * https://github.com/AsahiLinux/docs/wiki/HW:ARM-System-Registers + */ + +#ifndef __ASM_SYSREG_APPLE_H +#define __ASM_SYSREG_APPLE_H + +#include <asm/sysreg.h> +#include <linux/bits.h> +#include <linux/bitfield.h> + +/* + * Keep these registers in encoding order, except for register arrays; + * those should be listed in array order starting from the position of + * the encoding of the first register. + */ + +#define SYS_APL_PMCR0_EL1 sys_reg(3, 1, 15, 0, 0) +#define PMCR0_IMODE GENMASK(10, 8) +#define PMCR0_IMODE_OFF 0 +#define PMCR0_IMODE_PMI 1 +#define PMCR0_IMODE_AIC 2 +#define PMCR0_IMODE_HALT 3 +#define PMCR0_IMODE_FIQ 4 +#define PMCR0_IACT BIT(11) + +/* IPI request registers */ +#define SYS_APL_IPI_RR_LOCAL_EL1 sys_reg(3, 5, 15, 0, 0) +#define SYS_APL_IPI_RR_GLOBAL_EL1 sys_reg(3, 5, 15, 0, 1) +#define IPI_RR_CPU GENMASK(7, 0) +/* Cluster only used for the GLOBAL register */ +#define IPI_RR_CLUSTER GENMASK(23, 16) +#define IPI_RR_TYPE GENMASK(29, 28) +#define IPI_RR_IMMEDIATE 0 +#define IPI_RR_RETRACT 1 +#define IPI_RR_DEFERRED 2 +#define IPI_RR_NOWAKE 3 + +/* IPI status register */ +#define SYS_APL_IPI_SR_EL1 sys_reg(3, 5, 15, 1, 1) +#define IPI_SR_PENDING BIT(0) + +/* Guest timer FIQ enable register */ +#define SYS_APL_VM_TMR_FIQ_ENA_EL1 sys_reg(3, 5, 15, 1, 3) +#define VM_TMR_FIQ_ENABLE_V BIT(0) +#define VM_TMR_FIQ_ENABLE_P BIT(1) + +/* Deferred IPI countdown register */ +#define SYS_APL_IPI_CR_EL1 sys_reg(3, 5, 15, 3, 1) + +#define SYS_APL_UPMCR0_EL1 sys_reg(3, 7, 15, 0, 4) +#define UPMCR0_IMODE GENMASK(18, 16) +#define UPMCR0_IMODE_OFF 0 +#define UPMCR0_IMODE_AIC 2 +#define UPMCR0_IMODE_HALT 3 +#define UPMCR0_IMODE_FIQ 4 + +#define SYS_APL_UPMSR_EL1 sys_reg(3, 7, 15, 6, 4) +#define UPMSR_IACT BIT(0) + +#endif /* __ASM_SYSREG_APPLE_H */
Apple ARM64 SoCs have a ton of vendor-specific registers we're going to have to deal with, and those don't really belong in sysreg.h with all the architectural registers. Make a new home for them, and add some registers which are useful for early bring-up. Signed-off-by: Hector Martin <marcan@marcan.st> --- MAINTAINERS | 1 + arch/arm64/include/asm/sysreg_apple.h | 69 +++++++++++++++++++++++++++ 2 files changed, 70 insertions(+) create mode 100644 arch/arm64/include/asm/sysreg_apple.h