From patchwork Sat Feb 27 16:41:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Devera X-Patchwork-Id: 388515 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 92521C433E0 for ; Sat, 27 Feb 2021 17:05:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5610864E7A for ; Sat, 27 Feb 2021 17:05:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230010AbhB0REj (ORCPT ); Sat, 27 Feb 2021 12:04:39 -0500 Received: from ms9.eaxlabs.cz ([147.135.177.209]:60280 "EHLO ms9.eaxlabs.cz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230202AbhB0RCH (ORCPT ); Sat, 27 Feb 2021 12:02:07 -0500 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=eaxlabs.cz; s=mail; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=eOs4SLRlAzsZ6cq4rK82CE++LJAeAcVjjxdMbB7lWMU=; b=Rx5I971fCaF8TayhMAbvvEUAhxGgYr1jPVgmB8i8nYoSENiKF/s0aIn15Ir/0Fgw1IDP9h7afe2u7Islsn7RcNMZpIeB2m7fpjgUviQBk026uhy9QB6XRP16Syo559ehrOH5wxMxsbZOTjg3ew7tMyZrg8wIO/PiHGdRxyuU31Y=; Received: from [82.99.129.6] (helo=localhost.localdomain) by ms9.eaxlabs.cz with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.84_2) (envelope-from ) id 1lG2fZ-0005pS-MJ; Sat, 27 Feb 2021 17:42:19 +0100 From: Martin Devera To: linux-kernel@vger.kernel.org Cc: Martin Devera , Greg Kroah-Hartman , Rob Herring , Maxime Coquelin , Alexandre Torgue , Jiri Slaby , Le Ray , linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 1/2] tty/serial: Add rx-tx-swap OF option to stm32-usart Date: Sat, 27 Feb 2021 17:41:56 +0100 Message-Id: <20210227164157.30971-1-devik@eaxlabs.cz> X-Mailer: git-send-email 2.11.0 In-Reply-To: References: Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org STM32 F7/H7 usarts supports RX & TX pin swapping. Add option to turn it on. Tested on STM32MP157. Signed-off-by: Martin Devera Acked-by: Fabrice Gasnier Acked-by: Fabrice Gasnier Acked-by: Fabrice Gasnier --- drivers/tty/serial/stm32-usart.c | 3 ++- drivers/tty/serial/stm32-usart.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c index b3675cf25a69..3650c8798061 100644 --- a/drivers/tty/serial/stm32-usart.c +++ b/drivers/tty/serial/stm32-usart.c @@ -758,7 +758,7 @@ static void stm32_usart_set_termios(struct uart_port *port, cr1 = USART_CR1_TE | USART_CR1_RE; if (stm32_port->fifoen) cr1 |= USART_CR1_FIFOEN; - cr2 = 0; + cr2 = stm32_port->swap ? USART_CR2_SWAP : 0; cr3 = readl_relaxed(port->membase + ofs->cr3); cr3 &= USART_CR3_TXFTIE | USART_CR3_RXFTCFG_MASK | USART_CR3_RXFTIE | USART_CR3_TXFTCFG_MASK; @@ -1078,6 +1078,7 @@ static struct stm32_port *stm32_usart_of_get_port(struct platform_device *pdev) stm32_ports[id].hw_flow_control = of_property_read_bool (np, "st,hw-flow-ctrl") /*deprecated*/ || of_property_read_bool (np, "uart-has-rtscts"); + stm32_ports[id].swap = of_property_read_bool(np, "rx-tx-swap"); stm32_ports[id].port.line = id; stm32_ports[id].cr1_irq = USART_CR1_RXNEIE; stm32_ports[id].cr3_irq = 0; diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h index cb4f327c46db..2f054e2dc0ab 100644 --- a/drivers/tty/serial/stm32-usart.h +++ b/drivers/tty/serial/stm32-usart.h @@ -271,6 +271,7 @@ struct stm32_port { int last_res; bool tx_dma_busy; /* dma tx busy */ bool hw_flow_control; + bool swap; /* swap RX & TX pins */ bool fifoen; int wakeirq; int rdr_mask; /* receive data register mask */