From patchwork Thu Feb 25 14:08:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 387368 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8BBE5C433E9 for ; Thu, 25 Feb 2021 14:11:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4582964F17 for ; Thu, 25 Feb 2021 14:11:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229845AbhBYOKp (ORCPT ); Thu, 25 Feb 2021 09:10:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49494 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233077AbhBYOKh (ORCPT ); Thu, 25 Feb 2021 09:10:37 -0500 Received: from mail-pf1-x42b.google.com (mail-pf1-x42b.google.com [IPv6:2607:f8b0:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A622CC061793 for ; Thu, 25 Feb 2021 06:09:20 -0800 (PST) Received: by mail-pf1-x42b.google.com with SMTP id j12so3662116pfj.12 for ; Thu, 25 Feb 2021 06:09:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+/fZuaWYVZIMIkTfAOgxpNFqBTcFkZg8zMovp/of1IE=; b=QQq9Hyp6dQvfLQP4R5h1797glkzOuUgcY0k++QNnerFfLYh8aDNnUmh6CJDyZpKB7J wTIUaAnpolneUPzLvhoOY0e1qkVec2T1vTEf/iYQbSL5QUPB4rq747O500T6shcgcG7W ny4VVf3fnupgoSCjCksbtABCyhQ5uu6fYFpj0FCklS+ahdoV1PknvSzpvG49D7GJg+Xt iDvC4NIQxLG5CxKcdx8jHxar/Y98e1nDeGBDWfouLejDbCq/RgCkiK7Sof/aOem9cRVT bah8x4QnwbN2ulCCBygGmOUMpMVw0kSyrK0zruK/56IdTO/97MchfA0leEwnEjtrL6J6 nlNA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=+/fZuaWYVZIMIkTfAOgxpNFqBTcFkZg8zMovp/of1IE=; b=lSsdshg+EaBcHotI8APIycyvo82DSkHhhmSeOPiWtHb2EKEeNpCl55bnq44I5mB6Oc 1c+XlGRChyb1iha6TOK5uwPgBhDyRqxTg4UKEs229CPgScsGZ/t5PtM6at+QcDPH9io+ E4DIc8jgdhybnGcOA325aEjwjHAsXLs1NuTUpjyWcIttEhZ4DNyFUEttdc3cW27hnq2H /MOedVvRHfjQY0z2oHGZlDMjHHYIBaN8sZq1it6Hxi2/WcDXzhvr3wYiJIvCuRiPYwmP kNLT65qIePYZuS+5oOl446i3BuXWDhEHtyPdY9yE0i5dPEDOczJLQgyMQRHCwonRvJZ+ 26dw== X-Gm-Message-State: AOAM531eY6IuUw0pj8+ckyyxSCf3PkNlSAXiZ2tttCDe9jxYqg0iJg8u tIqoouzRHJe/AbgVTxxIi9W1 X-Google-Smtp-Source: ABdhPJwVFyz+crFLDkYG/XHLDkUo66t4VXaT6pkICGmOeNSZ9uGzMSs/LPo3hrAylx2FuDPNOpMlVg== X-Received: by 2002:a63:a512:: with SMTP id n18mr3051853pgf.329.1614262160060; Thu, 25 Feb 2021 06:09:20 -0800 (PST) Received: from localhost.localdomain ([103.66.79.45]) by smtp.gmail.com with ESMTPSA id f3sm6228918pfe.25.2021.02.25.06.09.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 Feb 2021 06:09:19 -0800 (PST) From: Manivannan Sadhasivam To: miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, robh+dt@kernel.org Cc: linux-arm-msm@vger.kernel.org, linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, boris.brezillon@collabora.com, Daniele.Palmas@telit.com, bjorn.andersson@linaro.org, Manivannan Sadhasivam Subject: [PATCH v3 2/3] dt-bindings: mtd: Add a property to declare secure regions in NAND chips Date: Thu, 25 Feb 2021 19:38:41 +0530 Message-Id: <20210225140842.66927-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210225140842.66927-1-manivannan.sadhasivam@linaro.org> References: <20210225140842.66927-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On a typical end product, a vendor may choose to secure some regions in the NAND memory which are supposed to stay intact between FW upgrades. The access to those regions will be blocked by a secure element like Trustzone. So the normal world software like Linux kernel should not touch these regions (including reading). So let's add a property for declaring such secure regions so that the drivers can skip touching them. Signed-off-by: Manivannan Sadhasivam --- Documentation/devicetree/bindings/mtd/nand-controller.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/nand-controller.yaml b/Documentation/devicetree/bindings/mtd/nand-controller.yaml index d0e422f4b3e0..acc7dfd6ef28 100644 --- a/Documentation/devicetree/bindings/mtd/nand-controller.yaml +++ b/Documentation/devicetree/bindings/mtd/nand-controller.yaml @@ -143,6 +143,13 @@ patternProperties: Ready/Busy pins. Active state refers to the NAND ready state and should be set to GPIOD_ACTIVE_HIGH unless the signal is inverted. + secure-regions: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + Regions in the NAND chip which are protected using a secure element + like Trustzone. This property contains the start address and size of + the secure regions present. + required: - reg