From patchwork Sun Feb 7 23:12:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Le Moal X-Patchwork-Id: 378162 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4C5F8C433E0 for ; Sun, 7 Feb 2021 23:17:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 116F064E32 for ; Sun, 7 Feb 2021 23:17:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229618AbhBGXRl (ORCPT ); Sun, 7 Feb 2021 18:17:41 -0500 Received: from esa2.hgst.iphmx.com ([68.232.143.124]:64368 "EHLO esa2.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229590AbhBGXRl (ORCPT ); Sun, 7 Feb 2021 18:17:41 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1612739944; x=1644275944; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NxkrMnisgB5Y7CCjo51izxzf/ZM8UZEu9H+xpU97oZI=; b=nhZmT4K+mrHkKjVR/2A1jcuqbAJstmeKERWVMvdkQ4Draz8/1GJXBgE7 H5hejOaWLVt8t3GoIcWRxmXBETBj9eGKXj7O78EDgsWo95+3xnLQeTkzP SWKFEFyux88N1vPeGhk0qb3e4TPzfhbHNSR5aXnjcQAl8zCQKTgArZJa/ g3fwG5dbs2u9oUUnYdWsRqDgApKErd0jlJcOZtF/8RA6sgATvFLHJ8qOp PEAoh0wT4b3TFW+s/X55GOymwr4ssllGDbfK0oUpAD3QTS9mBXo9ar2Wc MWo4rc3yijWcfqSBuEPGia0IoKm+geQtK0wzuxacmWVSLej4o04lSo4Y1 w==; IronPort-SDR: HYUmUnQvnMS9VVUYC3/FZWRm1OTlf9HF4YGxqJnleOEsi8eSAiiZF18bSRoL0bqQKNmvhyXdzA lMEv4nNZPrwD8ICNOqp+fcGdbEFSaRVWijGKpC4UO7ci4jgnbE87OFBFE2XOSrsJkYfz5tqCpA UkKrsP1HdufM8tXyl+CtPSAbMZS0lWPQM8jQZ2HtvVhKKp0U1iKmhi/ZBgbMslueuCGjKBiGxO Zy8Sr00Z0+0M1gs4YZXL9q+ZIbvmEeSYtrUya7uhpNo5rMJAqae6jK0kRh5UH4gWXY8wnwON5Y PSM= X-IronPort-AV: E=Sophos;i="5.81,160,1610380800"; d="scan'208";a="263503279" Received: from uls-op-cesaip01.wdc.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 08 Feb 2021 07:32:53 +0800 IronPort-SDR: JJDHb1Tq6P4HfyeFqaL0664BUwR2qo9VTBejqb4gqpwGOj/oNb16trN/2mJ5jUUNkPOZoKqipa SodSyUXxGO2X+BxE6tYb5lDFYZeh4NHag8/7fWQKGtS93zH1FkW4n0gqskrb+Nbi78DaJFkYeV 6Akr189s+3lNF46FHd2PNTCCmFwkw8CIw+RurPSnYLLbp16Ii+H3x3ARm8bydYAtGcL6c2wx5f R48Jpezt37XNd6KEoS288Me4CIHEAoGBirWFpd0YSxrGBlXrEU6KQVFEK/E1jIYmx3/Gj3CGdT iDuSpfYQ/vmdkYk26UnMHHZH Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Feb 2021 14:57:15 -0800 IronPort-SDR: DPLcY7FvIHPsdt65cNd8yR7yqnNW1DDS86PqNwWcvQmydiAC0lF1VbA9zrb5UAd+0TjCWuOA7k z6+mwM7+ju9lMGEgteCWvZAclMXyklG3KYb3sPWJGu2gtxTkl0JdRuxWZjRjqoK03xGVSL5Ju1 16ldBA6u10ea/d+V8NES8XUFt7l3H+7/xDoo8DgQ1k7RXK18lLQ3Trn/z+LtROPM+kyRZzR315 MBUdj+XEe7wCguX+WdYtGM82/ZhRxYQ4HRPS7bMMeSgxOFn89ViSwW0y6/0/WPKgYL1+/Eym9x uFQ= WDCIronportException: Internal Received: from phd004806.ad.shared (HELO twashi.fujisawa.hgst.com) ([10.84.71.69]) by uls-op-cesaip02.wdc.com with ESMTP; 07 Feb 2021 15:13:22 -0800 From: Damien Le Moal To: Palmer Dabbelt , linux-riscv@lists.infradead.org Cc: Atish Patra , Anup Patel , Sean Anderson , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v17 13/16] riscv: Add SiPeed MAIXDUINO board device tree Date: Mon, 8 Feb 2021 08:12:53 +0900 Message-Id: <20210207231256.115130-14-damien.lemoal@wdc.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210207231256.115130-1-damien.lemoal@wdc.com> References: <20210207231256.115130-1-damien.lemoal@wdc.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the device tree sipeed_maixduino.dts for the SiPeed MAIXDUINO board. This device tree enables LEDs and spi/mmc SD card device. Additionally, gpios and i2c are also enabled and mapped to the board header pins as indicated on the board itself. Cc: Rob Herring Cc: devicetree@vger.kernel.org Signed-off-by: Damien Le Moal Reviewed-by: Anup Patel --- .../boot/dts/canaan/sipeed_maixduino.dts | 209 ++++++++++++++++++ 1 file changed, 209 insertions(+) create mode 100644 arch/riscv/boot/dts/canaan/sipeed_maixduino.dts diff --git a/arch/riscv/boot/dts/canaan/sipeed_maixduino.dts b/arch/riscv/boot/dts/canaan/sipeed_maixduino.dts new file mode 100644 index 000000000000..804edc45eeeb --- /dev/null +++ b/arch/riscv/boot/dts/canaan/sipeed_maixduino.dts @@ -0,0 +1,209 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019-20 Sean Anderson + * Copyright (C) 2020 Western Digital Corporation or its affiliates. + */ + +/dts-v1/; + +#include "k210.dtsi" + +#include +#include + +/ { + model = "SiPeed MAIXDUINO"; + compatible = "sipeed,maixduino", "canaan,kendryte-k210"; + + chosen { + bootargs = "earlycon console=ttySIF0"; + stdout-path = "serial0:115200n8"; + }; + + gpio-keys { + compatible = "gpio-keys"; + + boot { + label = "BOOT"; + linux,code = ; + gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; + }; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + status = "disabled"; + + simple-audio-card,cpu { + sound-dai = <&i2s0 0>; + }; + + simple-audio-card,codec { + sound-dai = <&mic>; + }; + }; + + mic: mic { + #sound-dai-cells = <0>; + compatible = "memsensing,msm261s4030h0"; + status = "disabled"; + }; + + vcc_3v3: regulator-3v3 { + compatible = "regulator-fixed"; + regulator-name = "3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; +}; + +&fpioa { + status = "okay"; + + uarths_pinctrl: uarths-pinmux { + pinmux = , /* Header "0" */ + ; /* Header "1" */ + }; + + gpio_pinctrl: gpio-pinmux { + pinmux = , + ; + }; + + gpiohs_pinctrl: gpiohs-pinmux { + pinmux = , /* BOOT */ + , /* Header "2" */ + , /* Header "3" */ + , /* Header "4" */ + , /* Header "5" */ + , /* Header "6" */ + , /* Header "7" */ + , /* Header "8" */ + , /* Header "9" */ + , /* Header "10" */ + , /* Header "11" */ + , /* Header "12" */ + ; /* Header "13" */ + }; + + i2s0_pinctrl: i2s0-pinmux { + pinmux = , + , + ; + }; + + spi1_pinctrl: spi1-pinmux { + pinmux = , + , + , + ; /* cs */ + }; + + i2c1_pinctrl: i2c1-pinmux { + pinmux = , /* Header "scl" */ + ; /* Header "sda" */ + }; + + i2s1_pinctrl: i2s1-pinmux { + pinmux = , + , + ; + }; + + spi0_pinctrl: spi0-pinmux { + pinmux = , /* cs */ + , /* rst */ + , /* dc */ + ; /* wr */ + }; + + dvp_pinctrl: dvp-pinmux { + pinmux = , + , + , + , + , + , + , + ; + }; +}; + +&uarths0 { + pinctrl-0 = <&uarths_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio0 { + pinctrl-0 = <&gpiohs_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio1 { + pinctrl-0 = <&gpio_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2s0 { + #sound-dai-cells = <1>; + pinctrl-0 = <&i2s0_pinctrl>; + pinctrl-names = "default"; +}; + +&i2c1 { + pinctrl-0 = <&i2c1_pinctrl>; + pinctrl-names = "default"; + clock-frequency = <400000>; + status = "okay"; +}; + +&dvp0 { + pinctrl-0 = <&dvp_pinctrl>; + pinctrl-names = "default"; +}; + +&spi0 { + pinctrl-0 = <&spi0_pinctrl>; + pinctrl-names = "default"; + num-cs = <1>; + cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>; + + panel@0 { + compatible = "sitronix,st7789v"; + reg = <0>; + reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; + dc-gpios = <&gpio0 22 0>; + spi-max-frequency = <15000000>; + power-supply = <&vcc_3v3>; + }; +}; + +&spi1 { + pinctrl-0 = <&spi1_pinctrl>; + pinctrl-names = "default"; + num-cs = <1>; + cs-gpios = <&gpio1_0 2 GPIO_ACTIVE_LOW>; + status = "okay"; + + slot@0 { + compatible = "mmc-spi-slot"; + reg = <0>; + voltage-ranges = <3300 3300>; + spi-max-frequency = <25000000>; + broken-cd; + }; +}; + +&spi3 { + spi-flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + m25p,fast-read; + broken-flash-reset; + }; +};