From patchwork Fri Feb 5 23:47:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Li X-Patchwork-Id: 377740 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2D071C433E0 for ; Sat, 6 Feb 2021 02:47:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E4C8A64EEF for ; Sat, 6 Feb 2021 02:47:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230034AbhBFCrQ (ORCPT ); Fri, 5 Feb 2021 21:47:16 -0500 Received: from inva020.nxp.com ([92.121.34.13]:49130 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231758AbhBFCni (ORCPT ); Fri, 5 Feb 2021 21:43:38 -0500 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id E66E11A179A; Sat, 6 Feb 2021 00:50:51 +0100 (CET) Received: from smtp.na-rdc02.nxp.com (usphx01srsp001v.us-phx01.nxp.com [134.27.49.11]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 960EF1A023C; Sat, 6 Feb 2021 00:50:51 +0100 (CET) Received: from right.am.freescale.net (right.am.freescale.net [10.81.116.70]) by usphx01srsp001v.us-phx01.nxp.com (Postfix) with ESMTP id 0B0B740A63; Fri, 5 Feb 2021 16:50:51 -0700 (MST) From: Li Yang To: Shawn Guo , Rob Herring , devicetree@vger.kernel.org, Oleksij Rempel , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Li Yang Subject: [PATCH 06/15] ARM: dts: ls1021a: update pcie nodes for dt-schema check Date: Fri, 5 Feb 2021 17:47:25 -0600 Message-Id: <20210205234734.3397-7-leoyang.li@nxp.com> X-Mailer: git-send-email 2.25.1.377.g2d2118b In-Reply-To: <20210205234734.3397-1-leoyang.li@nxp.com> References: <20210205234734.3397-1-leoyang.li@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Break up long values to pass dt-schema checks. Signed-off-by: Li Yang --- arch/arm/boot/dts/ls1021a.dtsi | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index 4bf6320c85d9..959a3c85b83e 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -842,8 +842,8 @@ pcie@3400000 { compatible = "fsl,ls1021a-pcie"; - reg = <0x00 0x03400000 0x0 0x00010000 /* controller registers */ - 0x40 0x00000000 0x0 0x00002000>; /* configuration space */ + reg = <0x00 0x03400000 0x0 0x00010000>, /* controller registers */ + <0x40 0x00000000 0x0 0x00002000>; /* configuration space */ reg-names = "regs", "config"; interrupts = ; /* controller interrupt */ fsl,pcie-scfg = <&scfg 0>; @@ -852,8 +852,8 @@ device_type = "pci"; num-viewport = <6>; bus-range = <0x0 0xff>; - ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */ - 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000>, /* downstream I/O */ + <0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ msi-parent = <&msi1>, <&msi2>; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; @@ -866,8 +866,8 @@ pcie@3500000 { compatible = "fsl,ls1021a-pcie"; - reg = <0x00 0x03500000 0x0 0x00010000 /* controller registers */ - 0x48 0x00000000 0x0 0x00002000>; /* configuration space */ + reg = <0x00 0x03500000 0x0 0x00010000>, /* controller registers */ + <0x48 0x00000000 0x0 0x00002000>; /* configuration space */ reg-names = "regs", "config"; interrupts = ; fsl,pcie-scfg = <&scfg 1>; @@ -876,8 +876,8 @@ device_type = "pci"; num-viewport = <6>; bus-range = <0x0 0xff>; - ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */ - 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000>, /* downstream I/O */ + <0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ msi-parent = <&msi1>, <&msi2>; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>;