From patchwork Fri Feb 5 06:58:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Le Moal X-Patchwork-Id: 377784 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 73DC7C433E6 for ; Fri, 5 Feb 2021 07:02:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3DC5D64F9C for ; Fri, 5 Feb 2021 07:02:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231260AbhBEHB6 (ORCPT ); Fri, 5 Feb 2021 02:01:58 -0500 Received: from esa2.hgst.iphmx.com ([68.232.143.124]:41747 "EHLO esa2.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231258AbhBEHBz (ORCPT ); Fri, 5 Feb 2021 02:01:55 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1612509678; x=1644045678; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=cLJLy/HsfaKJnI40HMcMyu6lTnD7VmKbWkTSB5pV0yE=; b=Np2lzwZph1MNk+XZ6AG6vLRWYul288M6b0jNEf0qQ0GnwcO5V1BjzZvI muHJ8BE/r6zJ398D66AMVF7jHaJl+UmmsYLUB1AgfAEhS6j8heacgMTQW 5qqahcq2ng69ZayNh5L2MNqy0Dxlil2oPRlCjQcXhftTo8t3bBs3pmHtI VmtZcgh7Q0nw/CmTyOgQWbwXvWudk9M+ILjJeDEzqZ2FGkYvLnEAG5Mxh I8QK4w9MdaFAWuQ46Lw2JIRDFUoOupdhvqysvsrllofxwpDtR3tqsJ6yT twLMOg/CwIRYpl9ErUuB/Eem6uHvx/V810PluYjyL5xU+u1aorM0ptbtr Q==; IronPort-SDR: ClZDYWMwo9UpB8Om9CCZfyYoVcqt0yojlITx80lgRmxjcJvQP4OaEL+rImBuMgx1WwZsr3w/Ye PKzJBq0zUW+Do0BGyUJzI6QYwzyQfT3G4OXV3NnFamMCrkDn7D7RC6qFyWPTFsgrulRxAgLuHe NYaOtqVbitkERQ4hXj/m1SyY3gVjBnJ1d7JCOHP5LeFpLeimqcu29MHIJELJ6B/mqfoUgOTZWK mGknejyvVId3x9PWs37Nk+uf6RWKg1VSnFgFab75ECLNLBarVsSzVC0TTBiTfyj8QukLWKI/8K Drk= X-IronPort-AV: E=Sophos;i="5.81,154,1610380800"; d="scan'208";a="263312086" Received: from h199-255-45-15.hgst.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 05 Feb 2021 15:16:44 +0800 IronPort-SDR: NzD2ewRbhF0Ja0m7wmX1HOChdYlskvODlZ9HNwQHKTELSo8y25/OO2hUVRaLGxJQj5wJJOKHD+ 8nYQ+2IORgdSzgUpGOaE+9us5nj/u7YH6z7uUToJyc8L+E/kHtif5yphV3XTtEUVmpfohQzvnf WfhKzkrXUA2L3tYnKIW7luTjoNk5Wlf7uknEFHb6EHqHEjS5H7t67JdrW3xkHjKYNRe5Dl9aU3 Y2E+s4Fb8XRRdZ4pTDc/bYh/TYvakPB6MTK6gisKMPH239/NMCDTMQCgb89y3rMzJfp8EFatFG TQs18nW8r61wKpKckz+cv4EN Received: from uls-op-cesaip01.wdc.com ([10.248.3.36]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Feb 2021 22:40:55 -0800 IronPort-SDR: PSW0GsCjVJINWB8z7FUaSLwfGkwrYe4EwKurAVPYTQzQ46QB/WjahQfFX5R7SHv8X1YhNNIfBZ hW1J+7qaOhdAB0G5Vbt+SU2ucnGuAih+iPzVBIb+Bi/i+ChYyXibC5aL3LIvySvZz65gT7CGYj aSu30ESNe5LL9L/O2N2vYADU10y619Cx0WJYz5HHp/MBCAc42jy4lwJpwjiJrLqqW1iUXXKDQc I5gni3V7mEohFs6wwXZaTCjLAXHFL/h2YURBVrqdmo6QnQT0ascOdgM7mu11leFV6DKYCtMp6Y maI= WDCIronportException: Internal Received: from wdapacbjl0003.my.asia.wdc.com (HELO twashi.fujisawa.hgst.com) ([10.84.71.58]) by uls-op-cesaip01.wdc.com with ESMTP; 04 Feb 2021 22:58:51 -0800 From: Damien Le Moal To: Palmer Dabbelt , linux-riscv@lists.infradead.org Cc: Atish Patra , Anup Patel , Sean Anderson , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v16 11/16] riscv: Add SiPeed MAIX DOCK board device tree Date: Fri, 5 Feb 2021 15:58:22 +0900 Message-Id: <20210205065827.577285-12-damien.lemoal@wdc.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210205065827.577285-1-damien.lemoal@wdc.com> References: <20210205065827.577285-1-damien.lemoal@wdc.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the device tree sipeed_maix_dock.dts for the SiPeed MAIX DOCK m1 and m1w boards. This device tree enables LEDs, gpio, i2c and spi/mmc SD card devices. Cc: Rob Herring Cc: devicetree@vger.kernel.org Signed-off-by: Damien Le Moal --- .../boot/dts/canaan/sipeed_maix_dock.dts | 236 ++++++++++++++++++ 1 file changed, 236 insertions(+) create mode 100644 arch/riscv/boot/dts/canaan/sipeed_maix_dock.dts diff --git a/arch/riscv/boot/dts/canaan/sipeed_maix_dock.dts b/arch/riscv/boot/dts/canaan/sipeed_maix_dock.dts new file mode 100644 index 000000000000..fae0149a8740 --- /dev/null +++ b/arch/riscv/boot/dts/canaan/sipeed_maix_dock.dts @@ -0,0 +1,236 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019-20 Sean Anderson + * Copyright (C) 2020 Western Digital Corporation or its affiliates. + */ + +/dts-v1/; + +#include "k210.dtsi" + +#include +#include +#include + +/ { + model = "SiPeed MAIX Dock"; + compatible = "sipeed,maix-dock-m1", "sipeed,maix-dock-m1w", + "canaan,kendryte-k210"; + + chosen { + bootargs = "earlycon console=ttySIF0"; + stdout-path = "serial0:115200n8"; + }; + + gpio-leds { + compatible = "gpio-leds"; + + /* + * Note: the board wiring drawing documents green on + * gpio #4, red on gpio #5 and blue on gpio #6. However, + * the board is actually wired differently as defined here. + */ + led0 { + color = ; + label = "blue"; + gpios = <&gpio1_0 4 GPIO_ACTIVE_LOW>; + }; + + led1 { + color = ; + label = "green"; + gpios = <&gpio1_0 5 GPIO_ACTIVE_LOW>; + }; + + led2 { + color = ; + label = "red"; + gpios = <&gpio1_0 6 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + boot { + label = "BOOT"; + linux,code = ; + gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; + }; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + status = "disabled"; + + simple-audio-card,cpu { + sound-dai = <&i2s0 0>; + }; + + simple-audio-card,codec { + sound-dai = <&mic>; + }; + }; + + mic: mic { + #sound-dai-cells = <0>; + compatible = "memsensing,msm261s4030h0"; + status = "disabled"; + }; +}; + +&fpioa { + pinctrl-0 = <&jtag_pinctrl>; + pinctrl-names = "default"; + status = "okay"; + + jtag_pinctrl: jtag-pinmux { + pinmux = , + , + , + ; + }; + + uarths_pinctrl: uarths-pinmux { + pinmux = , + ; + }; + + gpio_pinctrl: gpio-pinmux { + pinmux = , + , + , + , + , + ; + }; + + gpiohs_pinctrl: gpiohs-pinmux { + pinmux = , + , + , + , + , + , + , + , + , + , + ; + }; + + i2s0_pinctrl: i2s0-pinmux { + pinmux = , + , + ; + }; + + dvp_pinctrl: dvp-pinmux { + pinmux = , + , + , + , + , + , + , + ; + }; + + spi0_pinctrl: spi0-pinmux { + pinmux = , /* cs */ + , /* rst */ + , /* dc */ + ; /* wr */ + }; + + spi1_pinctrl: spi1-pinmux { + pinmux = , + , + , + ; /* cs */ + }; + + i2c1_pinctrl: i2c1-pinmux { + pinmux = , + ; + }; +}; + +&uarths0 { + pinctrl-0 = <&uarths_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio0 { + pinctrl-0 = <&gpiohs_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio1 { + pinctrl-0 = <&gpio_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2s0 { + #sound-dai-cells = <1>; + pinctrl-0 = <&i2s0_pinctrl>; + pinctrl-names = "default"; +}; + +&i2c1 { + pinctrl-0 = <&i2c1_pinctrl>; + pinctrl-names = "default"; + clock-frequency = <400000>; + status = "okay"; +}; + +&dvp0 { + pinctrl-0 = <&dvp_pinctrl>; + pinctrl-names = "default"; +}; + +&spi0 { + pinctrl-0 = <&spi0_pinctrl>; + pinctrl-names = "default"; + num-cs = <1>; + cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>; + + panel@0 { + compatible = "sitronix,st7789v"; + reg = <0>; + reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; + dc-gpios = <&gpio0 22 0>; + spi-max-frequency = <15000000>; + status = "disabled"; + }; +}; + +&spi1 { + pinctrl-0 = <&spi1_pinctrl>; + pinctrl-names = "default"; + num-cs = <1>; + cs-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; + status = "okay"; + + slot@0 { + compatible = "mmc-spi-slot"; + reg = <0>; + voltage-ranges = <3300 3300>; + spi-max-frequency = <25000000>; + broken-cd; + }; +}; + +&spi3 { + spi-flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + m25p,fast-read; + broken-flash-reset; + }; +};