From patchwork Fri Feb 5 06:58:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Le Moal X-Patchwork-Id: 377785 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0AFD7C433DB for ; Fri, 5 Feb 2021 07:01:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B0AF964F92 for ; Fri, 5 Feb 2021 07:01:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231277AbhBEHBz (ORCPT ); Fri, 5 Feb 2021 02:01:55 -0500 Received: from esa2.hgst.iphmx.com ([68.232.143.124]:41743 "EHLO esa2.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231236AbhBEHBx (ORCPT ); Fri, 5 Feb 2021 02:01:53 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1612509676; x=1644045676; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ZVJszlCUeT8A82U+e6McWWtmRXvcdjQ3DcRByG4VQwg=; b=r8IcMMcm5XlTk1HOArNErgPn0Yz2m6SP55BhhNor3mhBsBpNUSVENkYv isyMm8uihBikd7ijvR4ECzSUTbvjYb33QTcwBSmpAzqQs7UEEUk5ILRdN RkDg+2I4CraaB1M2P7l/2nmjdZc5n8HTZWeb5nP/XjzzfFDnmom2l7cbJ sb7hxpCzkinq5INZliuqufLphZgkBBuLJ3z8U9SgkhhQuBScnGdMOgLU4 q3xHBBWvc4ETrRMq7Hi5YN4P5M7rqd6HHjBI5exyuJH865GO1LjfOw+aQ 1FtKlx44kNIC4ec5IREoQZ6puNgHfdWhejEcVRtsn/S5kGBj0YJVZkOVV Q==; IronPort-SDR: sSc8BuwAogeuEGiKeV9TtuhC3sQW8DqvmJ3Po4XasYyGH9nUG4GjlMfpF4TnC1R7WV+ueEtUGR ze9cEwWEiGeX6dLShRztwSGmfMqUrFLKPNcJ/JcZeMkXOzQOlrO3r+KoT7q9r8ODSazwm2pBPD gU/oIgqd6b7eHi8UbRXOcm2bFsN/8WJFQt0CVvhtYr/iBXyL8ZA8yqbxvJ0eWdvh4oTcWBpNPc poXl4Ovh2smy5POlM7uw08k0/WWPCSR6+gUBqMKk/3LcTb0/63DmwnRsJEKhw3evg430Cp+Op9 68w= X-IronPort-AV: E=Sophos;i="5.81,154,1610380800"; d="scan'208";a="263312081" Received: from h199-255-45-15.hgst.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 05 Feb 2021 15:16:41 +0800 IronPort-SDR: 9n7o4rdCNRUYba2Xi74RnUrjEttMxvmgyQIfHnMKDMQtStb/zjTVg6+ksZB7aSh8BABb52o8m4 V03w3R1asEN2wz0S0z/ianVd26+Si1yeCKpEBBuMKDWMg7dVQdTxN7eGdlhZ0znHDmrdNvZlbH lxxUhBLa6UM6LziGBo+ZdlT7rKfGrZYmXifsVynEUyLz1ske6htMWh+HVocVeUTLEkzqzmjYyE t+Uppdm1uEKTST1heFJ/kipYAmDc+ApBjXcOWUH8nSBbdOgbWpKIbjkQo6sOiGabPDWjqPxdM0 fx4xjU+EzKTfSedBm1gQsN8J Received: from uls-op-cesaip01.wdc.com ([10.248.3.36]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Feb 2021 22:40:53 -0800 IronPort-SDR: A8BBPlyLJMDAyXDzrWu71yBy1dvVKX1KOWyiHc5iqi0/3PXSrcSyYlRQfV95gwFryGVmVNzVSM zouEU+GDpMGJ8EfTirSk0vlwwtbtrheo8psnuEBP5/NA7YLC/EYcNmeCSXwmLbzJAxQnOawgzp wjcjmwhljmmCDOtMJdRzK/dymm1QwrhN5iZesltPZvINQEkxZvGlSOvrUOKGNw0J0dDCLIUnOu djxpNIXSm8tIHHAjPIGruIxnygCpofZGzjuEX8v92gsVLu/Iq6jW6ZvaTMarZpVQBXAVikbdOw iA4= WDCIronportException: Internal Received: from wdapacbjl0003.my.asia.wdc.com (HELO twashi.fujisawa.hgst.com) ([10.84.71.58]) by uls-op-cesaip01.wdc.com with ESMTP; 04 Feb 2021 22:58:50 -0800 From: Damien Le Moal To: Palmer Dabbelt , linux-riscv@lists.infradead.org Cc: Atish Patra , Anup Patel , Sean Anderson , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v16 10/16] riscv: Add SiPeed MAIX BiT board device tree Date: Fri, 5 Feb 2021 15:58:21 +0900 Message-Id: <20210205065827.577285-11-damien.lemoal@wdc.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210205065827.577285-1-damien.lemoal@wdc.com> References: <20210205065827.577285-1-damien.lemoal@wdc.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the device tree sipeed_maix_bit.dts for the SiPeed MAIX BiT and MAIX BiTm boards. This device tree enables LEDs, gpio, i2c and spi/mmc SD card devices. Cc: Rob Herring Cc: devicetree@vger.kernel.org Signed-off-by: Damien Le Moal --- .../riscv/boot/dts/canaan/sipeed_maix_bit.dts | 234 ++++++++++++++++++ 1 file changed, 234 insertions(+) create mode 100644 arch/riscv/boot/dts/canaan/sipeed_maix_bit.dts diff --git a/arch/riscv/boot/dts/canaan/sipeed_maix_bit.dts b/arch/riscv/boot/dts/canaan/sipeed_maix_bit.dts new file mode 100644 index 000000000000..11e491410f00 --- /dev/null +++ b/arch/riscv/boot/dts/canaan/sipeed_maix_bit.dts @@ -0,0 +1,234 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019-20 Sean Anderson + * Copyright (C) 2020 Western Digital Corporation or its affiliates. + */ + +/dts-v1/; + +#include "k210.dtsi" + +#include +#include +#include + +/ { + model = "SiPeed MAIX BiT"; + compatible = "sipeed,maix-bit", "sipeed,maix-bitm", + "canaan,kendryte-k210"; + + chosen { + bootargs = "earlycon console=ttySIF0"; + stdout-path = "serial0:115200n8"; + }; + + gpio-leds { + compatible = "gpio-leds"; + + led0 { + color = ; + label = "green"; + gpios = <&gpio1_0 4 GPIO_ACTIVE_LOW>; + }; + + led1 { + color = ; + label = "red"; + gpios = <&gpio1_0 5 GPIO_ACTIVE_LOW>; + }; + + led2 { + color = ; + label = "blue"; + gpios = <&gpio1_0 6 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + boot { + label = "BOOT"; + linux,code = ; + gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; + }; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + status = "disabled"; + + simple-audio-card,cpu { + sound-dai = <&i2s0 0>; + }; + + simple-audio-card,codec { + sound-dai = <&mic>; + }; + }; + + mic: mic { + #sound-dai-cells = <0>; + compatible = "memsensing,msm261s4030h0"; + status = "disabled"; + }; +}; + +&fpioa { + pinctrl-names = "default"; + pinctrl-0 = <&jtag_pinctrl>; + status = "okay"; + + jtag_pinctrl: jtag-pinmux { + pinmux = , + , + , + ; + }; + + uarths_pinctrl: uarths-pinmux { + pinmux = , + ; + }; + + gpio_pinctrl: gpio-pinmux { + pinmux = , + , + , + , + , + , + , + ; + }; + + gpiohs_pinctrl: gpiohs-pinmux { + pinmux = , + , + , + , + , + , + , + , + , + , + ; + }; + + i2s0_pinctrl: i2s0-pinmux { + pinmux = , + , + ; + }; + + dvp_pinctrl: dvp-pinmux { + pinmux = , + , + , + , + , + , + , + ; + }; + + spi0_pinctrl: spi0-pinmux { + pinmux = , /* cs */ + , /* rst */ + , /* dc */ + ; /* wr */ + }; + + spi1_pinctrl: spi1-pinmux { + pinmux = , + , + , + ; /* cs */ + }; + + i2c1_pinctrl: i2c1-pinmux { + pinmux = , + ; + }; +}; + +&uarths0 { + pinctrl-0 = <&uarths_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio0 { + pinctrl-0 = <&gpiohs_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio1 { + pinctrl-0 = <&gpio_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2s0 { + #sound-dai-cells = <1>; + pinctrl-0 = <&i2s0_pinctrl>; + pinctrl-names = "default"; +}; + +&i2c1 { + pinctrl-0 = <&i2c1_pinctrl>; + pinctrl-names = "default"; + clock-frequency = <400000>; + status = "okay"; +}; + +&dvp0 { + pinctrl-0 = <&dvp_pinctrl>; + pinctrl-names = "default"; +}; + +&spi0 { + pinctrl-0 = <&spi0_pinctrl>; + pinctrl-names = "default"; + num-cs = <1>; + cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>; + + panel@0 { + compatible = "sitronix,st7789v"; + reg = <0>; + reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; + dc-gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>; + spi-max-frequency = <15000000>; + spi-cs-high; + status = "disabled"; + }; +}; + +&spi1 { + pinctrl-0 = <&spi1_pinctrl>; + pinctrl-names = "default"; + num-cs = <1>; + cs-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; + status = "okay"; + + slot@0 { + compatible = "mmc-spi-slot"; + reg = <0>; + voltage-ranges = <3300 3300>; + spi-max-frequency = <25000000>; + broken-cd; + }; +}; + +&spi3 { + spi-flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + m25p,fast-read; + broken-flash-reset; + }; +};