From patchwork Wed Feb 3 12:59:08 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Le Moal X-Patchwork-Id: 375557 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E5A56C433DB for ; Wed, 3 Feb 2021 13:03:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8E22F64F53 for ; Wed, 3 Feb 2021 13:03:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230034AbhBCND2 (ORCPT ); Wed, 3 Feb 2021 08:03:28 -0500 Received: from esa2.hgst.iphmx.com ([68.232.143.124]:14157 "EHLO esa2.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230043AbhBCND0 (ORCPT ); Wed, 3 Feb 2021 08:03:26 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1612358042; x=1643894042; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=cLJLy/HsfaKJnI40HMcMyu6lTnD7VmKbWkTSB5pV0yE=; b=bplNr+6Wz0ZTcT0lDrwYOwGOTvoW6tnXrXTSfAKchkawiyidWhsEoap4 1rhgCz2cSS6/vNXJceYAxzhaym6kljZOCWYZgYAKm16X5sWBryHHkIyvF wGP1OFVvfjNzedv4YvtFVrH88aVSPVkhI0cB6iiZTHVWV8YPm14adnsQL D9YzQu1gjVPLJXSVK2G8BIquOVdTdyAYtk4nMjL7HIXnCAcaU8x3U3ZkS 1lMGqnonhMohxvbUWdbX1oiyt3z2YWgXKWbprZjnDAFwOJQKBboWGvbv7 +0MjrUc41bgKkjze571UXe+4JyNuz1kECZ9eIY5UNaXXkF+g1GtWLGeRk A==; IronPort-SDR: SHlFIzeQj1l8wlEz4iykymxJWUWiwFbfqMefVrIAp4Oyk//mDWSDid+DKybcZNyJP0hB1l97Jk /KQu+vMTU2n5vwMy0XcODCtKMngcDYzCO7OdN9gcExxWkCTVqoYYkqV/nF7M/rL37F8rvECqXt ygPi/fxRa+lV2mHwpbOIKZIZGAb9eFy+5YYwZ4zBpQywkA9GjRXLOHx365IDzea9l8eSApgJ9k 4ZiY94wmBw1AjzcZnA2NO0vhQOrNkXh3je5jV2Dv+YauRQ6KRjl9xOkhYB2m1ei8RpVvBGJb+w FU8= X-IronPort-AV: E=Sophos;i="5.79,398,1602518400"; d="scan'208";a="263106954" Received: from h199-255-45-14.hgst.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 03 Feb 2021 21:08:49 +0800 IronPort-SDR: 73I7uHGPgAIE2lsC7YCmMwtHqBz07YshWO2JVhQG8Kn2fjuufFCgY6u6tz3IzAezkXUC3kgQWE ijyBekYsUlz1Tuj6s5YN9vXM7pieDbwml/m191s8j72FKCgrYGbjjXEQpwbm1L0R6p4ZLZoDGQ dUiHxXFZh9N5wo/9P81t3V1AalOmWB9lJJgPi8wfm36nvs8AgdzpvXW1n/nvmnt3JKT27iI0UN 8GqIhCeSvs2ljM1Po36xsq2+hZaP6xdj/WuKXIhXNeuEoDM4zMto4iIoSK05GUnzP+D5v4UPtI gexZzSmjX3UWUy95JgCKmXD/ Received: from uls-op-cesaip01.wdc.com ([10.248.3.36]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2021 04:43:58 -0800 IronPort-SDR: FQMMPJyweYod6LvjosWTuQbwNrGKdhixIM6NbZpvmbPn9rg2NlZBnaL+tTNhTs8sHO0JYOhFJx QEp87BP8SG9HmMums5TjMAUi1S+7cgIr+PcYGK6Suf1rzpWfo1tAdoQ+aoiyS2pvC53x7WQ4aW B79pH0UxWhAIx1uKGrtawhH44x/QOBP6JvdGgRkrWpW0x0Ofl1208tv5Tgh2OH+RrTXp+/pWif OF/wBE3IPmyC45iB1PZ6+TNg30CmqbHk/SpyULW52GygF4/V/yOY9q3Pbr42dniWYIzX1HPyrH RF0= WDCIronportException: Internal Received: from wdapacbjl0003.my.asia.wdc.com (HELO twashi.fujisawa.hgst.com) ([10.84.71.58]) by uls-op-cesaip01.wdc.com with ESMTP; 03 Feb 2021 04:59:57 -0800 From: Damien Le Moal To: Palmer Dabbelt , linux-riscv@lists.infradead.org Cc: Atish Patra , Anup Patel , Sean Anderson , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v15 11/16] riscv: Add SiPeed MAIX DOCK board device tree Date: Wed, 3 Feb 2021 21:59:08 +0900 Message-Id: <20210203125913.390949-12-damien.lemoal@wdc.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210203125913.390949-1-damien.lemoal@wdc.com> References: <20210203125913.390949-1-damien.lemoal@wdc.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the device tree sipeed_maix_dock.dts for the SiPeed MAIX DOCK m1 and m1w boards. This device tree enables LEDs, gpio, i2c and spi/mmc SD card devices. Cc: Rob Herring Cc: devicetree@vger.kernel.org Signed-off-by: Damien Le Moal --- .../boot/dts/canaan/sipeed_maix_dock.dts | 236 ++++++++++++++++++ 1 file changed, 236 insertions(+) create mode 100644 arch/riscv/boot/dts/canaan/sipeed_maix_dock.dts diff --git a/arch/riscv/boot/dts/canaan/sipeed_maix_dock.dts b/arch/riscv/boot/dts/canaan/sipeed_maix_dock.dts new file mode 100644 index 000000000000..fae0149a8740 --- /dev/null +++ b/arch/riscv/boot/dts/canaan/sipeed_maix_dock.dts @@ -0,0 +1,236 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019-20 Sean Anderson + * Copyright (C) 2020 Western Digital Corporation or its affiliates. + */ + +/dts-v1/; + +#include "k210.dtsi" + +#include +#include +#include + +/ { + model = "SiPeed MAIX Dock"; + compatible = "sipeed,maix-dock-m1", "sipeed,maix-dock-m1w", + "canaan,kendryte-k210"; + + chosen { + bootargs = "earlycon console=ttySIF0"; + stdout-path = "serial0:115200n8"; + }; + + gpio-leds { + compatible = "gpio-leds"; + + /* + * Note: the board wiring drawing documents green on + * gpio #4, red on gpio #5 and blue on gpio #6. However, + * the board is actually wired differently as defined here. + */ + led0 { + color = ; + label = "blue"; + gpios = <&gpio1_0 4 GPIO_ACTIVE_LOW>; + }; + + led1 { + color = ; + label = "green"; + gpios = <&gpio1_0 5 GPIO_ACTIVE_LOW>; + }; + + led2 { + color = ; + label = "red"; + gpios = <&gpio1_0 6 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + boot { + label = "BOOT"; + linux,code = ; + gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; + }; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + status = "disabled"; + + simple-audio-card,cpu { + sound-dai = <&i2s0 0>; + }; + + simple-audio-card,codec { + sound-dai = <&mic>; + }; + }; + + mic: mic { + #sound-dai-cells = <0>; + compatible = "memsensing,msm261s4030h0"; + status = "disabled"; + }; +}; + +&fpioa { + pinctrl-0 = <&jtag_pinctrl>; + pinctrl-names = "default"; + status = "okay"; + + jtag_pinctrl: jtag-pinmux { + pinmux = , + , + , + ; + }; + + uarths_pinctrl: uarths-pinmux { + pinmux = , + ; + }; + + gpio_pinctrl: gpio-pinmux { + pinmux = , + , + , + , + , + ; + }; + + gpiohs_pinctrl: gpiohs-pinmux { + pinmux = , + , + , + , + , + , + , + , + , + , + ; + }; + + i2s0_pinctrl: i2s0-pinmux { + pinmux = , + , + ; + }; + + dvp_pinctrl: dvp-pinmux { + pinmux = , + , + , + , + , + , + , + ; + }; + + spi0_pinctrl: spi0-pinmux { + pinmux = , /* cs */ + , /* rst */ + , /* dc */ + ; /* wr */ + }; + + spi1_pinctrl: spi1-pinmux { + pinmux = , + , + , + ; /* cs */ + }; + + i2c1_pinctrl: i2c1-pinmux { + pinmux = , + ; + }; +}; + +&uarths0 { + pinctrl-0 = <&uarths_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio0 { + pinctrl-0 = <&gpiohs_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio1 { + pinctrl-0 = <&gpio_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2s0 { + #sound-dai-cells = <1>; + pinctrl-0 = <&i2s0_pinctrl>; + pinctrl-names = "default"; +}; + +&i2c1 { + pinctrl-0 = <&i2c1_pinctrl>; + pinctrl-names = "default"; + clock-frequency = <400000>; + status = "okay"; +}; + +&dvp0 { + pinctrl-0 = <&dvp_pinctrl>; + pinctrl-names = "default"; +}; + +&spi0 { + pinctrl-0 = <&spi0_pinctrl>; + pinctrl-names = "default"; + num-cs = <1>; + cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>; + + panel@0 { + compatible = "sitronix,st7789v"; + reg = <0>; + reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; + dc-gpios = <&gpio0 22 0>; + spi-max-frequency = <15000000>; + status = "disabled"; + }; +}; + +&spi1 { + pinctrl-0 = <&spi1_pinctrl>; + pinctrl-names = "default"; + num-cs = <1>; + cs-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; + status = "okay"; + + slot@0 { + compatible = "mmc-spi-slot"; + reg = <0>; + voltage-ranges = <3300 3300>; + spi-max-frequency = <25000000>; + broken-cd; + }; +}; + +&spi3 { + spi-flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + m25p,fast-read; + broken-flash-reset; + }; +};