From patchwork Tue Feb 2 10:36:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Le Moal X-Patchwork-Id: 374754 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CB511C433E0 for ; Tue, 2 Feb 2021 10:40:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9987464EDA for ; Tue, 2 Feb 2021 10:40:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229483AbhBBKkn (ORCPT ); Tue, 2 Feb 2021 05:40:43 -0500 Received: from esa6.hgst.iphmx.com ([216.71.154.45]:35920 "EHLO esa6.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229601AbhBBKkm (ORCPT ); Tue, 2 Feb 2021 05:40:42 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1612262442; x=1643798442; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NxkrMnisgB5Y7CCjo51izxzf/ZM8UZEu9H+xpU97oZI=; b=YVwM4MnSStZX80sQqxiHHLJfYDNGCI0VWOxQUNm27E7V0Q5+37UNslZx qKRqrTRsI+eMcsiysZDLp2MYYR5lCXdLbNpnjsy+yOxa4+8zt+RCo91Kw kOiPCQqZu9GdRUZ2ZXsurc4y1Ba205MR/03HDsfhWxWSgc2ODYH5XAOZv CT1Yyjra513EsJaRe/BAKnHkkVZpDYLG12mpgT1MI7dIsVzmvmgVjb++R +S9vafRcUy3cnkUBw85PK152IojJTo9vw3NmjH7eVHu0N8rA1bGM4WvUq EbT/evsO1IDvBEsNmaB72rkM/fitXPiHYmraNVPwYBXJTTe68E41P7Sdc Q==; IronPort-SDR: KhVx2x6JA96pCTVP8uYjsSCbmqwokYZpSp8x3ZOvJSGJVugvkWbfjAwjxCKaGQ2SBvgVWF6ovF iznShcTFhSV1peR5Q/a5+XJmi/HOBCbW2abznjkLNFQnzpRAdxYewGeE83jGhn6ruQ7iDllq3s yZI3r2i2oHj/kwLFk21G7Sq0LQaNHegWCddwJ2rKRUzmW3RUhhy9lBzOIDYm/7wu9Jj5wlLOcQ sJeHchx2vsmjXK/h2a0TCpxoXoAZ2++DdXnwuY/7aMQF4pwqYXrqes2RztLJCA3xZMATOFXuzv Tn4= X-IronPort-AV: E=Sophos;i="5.79,394,1602518400"; d="scan'208";a="160092515" Received: from uls-op-cesaip01.wdc.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 02 Feb 2021 18:37:05 +0800 IronPort-SDR: jXbtRzA4u3W3Xe/Dp/SZ/CU8B8t645r18Aw5YQItvgX9SyMaojv+Fh+xwIG9GZUWVwqFwrExGb k6X9l/mtR9WjhEELyxSW45hsXCKjum60cLV13BPRCaozwkBBcPVrVZWs4c1NUHl9+w5nKG9k+Q TmK2oGKzBx1VGkDFZkpD0/vcdiHT20n/B68KBi2qLjRbJPf5s4lTDFAzOgNL2gG7+i8rz8uZrF mTkmdVASvgdN2R2i27QIFFbD5xj88q5Jebb67exapwIOu0ulJ3QnC2Y25nWK+YnP/kdqw+6ewl 6NBfL+8YPggv/jCSo5huoRCv Received: from uls-op-cesaip01.wdc.com ([10.248.3.36]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Feb 2021 02:21:13 -0800 IronPort-SDR: SBrT1+Wtc5qBPoLEJhi2+fuyASoXSnYca+kBg8nM2LlOJ3i3PXgEHPWvzJr9pYLKCtsRusSTu1 ZWlZE7Namtn89K23UpMTXjAB6uj30MHh29LvrkSzjuityJLP46AySQrILJxNGRJ/teCJwmzZrY 2QVvsIokT5dSsY1qa0zREFSL+zD5ViATtYsUEybL+uxymPyancE+yR25VpbK/bQq/ZDzuwFp4m z7e/39XoVLzeO5fx/Zj+/YrFmzHH34aZlAH38MUwnq1Z9mMXjj72J76Ou0ZaSXOpLw1fOD0Pd9 ZqA= WDCIronportException: Internal Received: from wdapacbjl0003.my.asia.wdc.com (HELO twashi.fujisawa.hgst.com) ([10.84.71.58]) by uls-op-cesaip01.wdc.com with ESMTP; 02 Feb 2021 02:37:04 -0800 From: Damien Le Moal To: Palmer Dabbelt , linux-riscv@lists.infradead.org Cc: Atish Patra , Anup Patel , Sean Anderson , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v14 13/16] riscv: Add SiPeed MAIXDUINO board device tree Date: Tue, 2 Feb 2021 19:36:20 +0900 Message-Id: <20210202103623.200809-14-damien.lemoal@wdc.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210202103623.200809-1-damien.lemoal@wdc.com> References: <20210202103623.200809-1-damien.lemoal@wdc.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the device tree sipeed_maixduino.dts for the SiPeed MAIXDUINO board. This device tree enables LEDs and spi/mmc SD card device. Additionally, gpios and i2c are also enabled and mapped to the board header pins as indicated on the board itself. Cc: Rob Herring Cc: devicetree@vger.kernel.org Signed-off-by: Damien Le Moal --- .../boot/dts/canaan/sipeed_maixduino.dts | 209 ++++++++++++++++++ 1 file changed, 209 insertions(+) create mode 100644 arch/riscv/boot/dts/canaan/sipeed_maixduino.dts diff --git a/arch/riscv/boot/dts/canaan/sipeed_maixduino.dts b/arch/riscv/boot/dts/canaan/sipeed_maixduino.dts new file mode 100644 index 000000000000..804edc45eeeb --- /dev/null +++ b/arch/riscv/boot/dts/canaan/sipeed_maixduino.dts @@ -0,0 +1,209 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019-20 Sean Anderson + * Copyright (C) 2020 Western Digital Corporation or its affiliates. + */ + +/dts-v1/; + +#include "k210.dtsi" + +#include +#include + +/ { + model = "SiPeed MAIXDUINO"; + compatible = "sipeed,maixduino", "canaan,kendryte-k210"; + + chosen { + bootargs = "earlycon console=ttySIF0"; + stdout-path = "serial0:115200n8"; + }; + + gpio-keys { + compatible = "gpio-keys"; + + boot { + label = "BOOT"; + linux,code = ; + gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; + }; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + status = "disabled"; + + simple-audio-card,cpu { + sound-dai = <&i2s0 0>; + }; + + simple-audio-card,codec { + sound-dai = <&mic>; + }; + }; + + mic: mic { + #sound-dai-cells = <0>; + compatible = "memsensing,msm261s4030h0"; + status = "disabled"; + }; + + vcc_3v3: regulator-3v3 { + compatible = "regulator-fixed"; + regulator-name = "3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; +}; + +&fpioa { + status = "okay"; + + uarths_pinctrl: uarths-pinmux { + pinmux = , /* Header "0" */ + ; /* Header "1" */ + }; + + gpio_pinctrl: gpio-pinmux { + pinmux = , + ; + }; + + gpiohs_pinctrl: gpiohs-pinmux { + pinmux = , /* BOOT */ + , /* Header "2" */ + , /* Header "3" */ + , /* Header "4" */ + , /* Header "5" */ + , /* Header "6" */ + , /* Header "7" */ + , /* Header "8" */ + , /* Header "9" */ + , /* Header "10" */ + , /* Header "11" */ + , /* Header "12" */ + ; /* Header "13" */ + }; + + i2s0_pinctrl: i2s0-pinmux { + pinmux = , + , + ; + }; + + spi1_pinctrl: spi1-pinmux { + pinmux = , + , + , + ; /* cs */ + }; + + i2c1_pinctrl: i2c1-pinmux { + pinmux = , /* Header "scl" */ + ; /* Header "sda" */ + }; + + i2s1_pinctrl: i2s1-pinmux { + pinmux = , + , + ; + }; + + spi0_pinctrl: spi0-pinmux { + pinmux = , /* cs */ + , /* rst */ + , /* dc */ + ; /* wr */ + }; + + dvp_pinctrl: dvp-pinmux { + pinmux = , + , + , + , + , + , + , + ; + }; +}; + +&uarths0 { + pinctrl-0 = <&uarths_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio0 { + pinctrl-0 = <&gpiohs_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio1 { + pinctrl-0 = <&gpio_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2s0 { + #sound-dai-cells = <1>; + pinctrl-0 = <&i2s0_pinctrl>; + pinctrl-names = "default"; +}; + +&i2c1 { + pinctrl-0 = <&i2c1_pinctrl>; + pinctrl-names = "default"; + clock-frequency = <400000>; + status = "okay"; +}; + +&dvp0 { + pinctrl-0 = <&dvp_pinctrl>; + pinctrl-names = "default"; +}; + +&spi0 { + pinctrl-0 = <&spi0_pinctrl>; + pinctrl-names = "default"; + num-cs = <1>; + cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>; + + panel@0 { + compatible = "sitronix,st7789v"; + reg = <0>; + reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; + dc-gpios = <&gpio0 22 0>; + spi-max-frequency = <15000000>; + power-supply = <&vcc_3v3>; + }; +}; + +&spi1 { + pinctrl-0 = <&spi1_pinctrl>; + pinctrl-names = "default"; + num-cs = <1>; + cs-gpios = <&gpio1_0 2 GPIO_ACTIVE_LOW>; + status = "okay"; + + slot@0 { + compatible = "mmc-spi-slot"; + reg = <0>; + voltage-ranges = <3300 3300>; + spi-max-frequency = <25000000>; + broken-cd; + }; +}; + +&spi3 { + spi-flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + m25p,fast-read; + broken-flash-reset; + }; +};