From patchwork Mon Feb 1 03:47:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jitao Shi X-Patchwork-Id: 374364 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.0 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, MIME_BASE64_TEXT, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 756B1C433DB for ; Mon, 1 Feb 2021 03:48:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3E57260231 for ; Mon, 1 Feb 2021 03:48:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230033AbhBADsv (ORCPT ); Sun, 31 Jan 2021 22:48:51 -0500 Received: from Mailgw01.mediatek.com ([1.203.163.78]:53203 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S231126AbhBADss (ORCPT ); Sun, 31 Jan 2021 22:48:48 -0500 X-UUID: 5e1ee2eb50a74496b375a3ef7e447988-20210201 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=ycki3f22lu0G/Y5pcD1WAXwXxWSc4abbISJZOTSNMNc=; b=pDOFhhxmjFLzOmwmHC4x9N38et/+Q01E1gSTzVtbD/xVJLLYDaoSXHkNsVS3sI1srpQ0GSORnxDwTEwdyvH3MBv+ELeNA98fRQUjHCZF9qvgP4cmRkLawcHYAjCffp6Vdr7HNcQnW61jSbxw6ws3DtrXsvP4NLROvku/oxEc4NY=; X-UUID: 5e1ee2eb50a74496b375a3ef7e447988-20210201 Received: from mtkcas36.mediatek.inc [(172.27.4.253)] by mailgw01.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1357974449; Mon, 01 Feb 2021 11:48:02 +0800 Received: from MTKCAS36.mediatek.inc (172.27.4.186) by MTKMBS33N2.mediatek.inc (172.27.4.76) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 1 Feb 2021 11:47:58 +0800 Received: from mszsdaap41.gcn.mediatek.inc (10.16.6.141) by MTKCAS36.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 1 Feb 2021 11:47:57 +0800 From: Jitao Shi To: Rob Herring , Mark Rutland , Matthias Brugger , Daniel Vetter , David Airlie , , CC: , , , , , , , , , , , , Jitao Shi Subject: [PATCH] drm/mediatek: fine tune the data lane trail by project dts Date: Mon, 1 Feb 2021 11:47:55 +0800 Message-ID: <20210201034755.15793-1-jitao.shi@mediatek.com> X-Mailer: git-send-email 2.12.5 MIME-Version: 1.0 X-TM-SNTS-SMTP: C09D5F74431AB1B049045EEA52CC4FCA78AF2ACAE1755FA553EE30718D904CAA2000:8 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Some panels or bridges require customized hs_da_trail time. So add a property in devicetree for this panels and bridges. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dsi.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) -- 2.12.5 diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index 8c70ec39bfe1..6e7092fa2fee 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -194,6 +194,7 @@ struct mtk_dsi { struct clk *hs_clk; u32 data_rate; + u32 da_trail_delta; unsigned long mode_flags; enum mipi_dsi_pixel_format format; @@ -234,7 +235,7 @@ static void mtk_dsi_phy_timconfig(struct mtk_dsi *dsi) timing->da_hs_prepare = (80 * data_rate_mhz + 4 * 1000) / 8000; timing->da_hs_zero = (170 * data_rate_mhz + 10 * 1000) / 8000 + 1 - timing->da_hs_prepare; - timing->da_hs_trail = timing->da_hs_prepare + 1; + timing->da_hs_trail = timing->da_hs_prepare + 1 + dsi->da_trail_delta; timing->ta_go = 4 * timing->lpx - 2; timing->ta_sure = timing->lpx + 2; @@ -1094,6 +1095,13 @@ static int mtk_dsi_probe(struct platform_device *pdev) goto err_unregister_host; } + ret = of_property_read_u32_index(dev->of_node, "da_trail_delta", 0, + &dsi->da_trail_delta); + if (ret) { + dev_info(dev, "Can't get da_trail_delta, keep it as 0: %d\n", ret); + dsi->da_trail_delta = 0; + } + comp_id = mtk_ddp_comp_get_id(dev->of_node, MTK_DSI); if (comp_id < 0) { dev_err(dev, "Failed to identify by alias: %d\n", comp_id);